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authorDenis Brockus <dbrockus@chromium.org>2019-06-25 12:44:16 -0600
committerCommit Bot <commit-bot@chromium.org>2019-07-19 21:11:02 +0000
commitd1a18f82ed831d4e640336ff5571f5fa64bc7b36 (patch)
treec46aeb6136de1c27c66e3d5f662e9620161bef7b /chip/stm32/i2c-stm32f4.c
parent1f14229fa7e499dfcee07d17add187598ff0a46c (diff)
downloadchrome-ec-d1a18f82ed831d4e640336ff5571f5fa64bc7b36.tar.gz
Use 7bit I2C/SPI slave addresses in EC
Opt for 7bit slave addresses in EC code. If 8bit is expected by a driver, make it local and show this in the naming. Use __7b, __7bf and __8b as name extensions for i2c/spi addresses used in the EC codebase. __7b indicates a 7bit address by itself. __7bf indicates a 7bit address with optional flags attached. __8b indicates a 8bit address by itself. Allow space for 10bit addresses, even though this is not currently being used by any of our attached devices. These extensions are for verification purposes only and will be removed in the last pass of this ticket. I want to make sure the variable names reflect the type to help eliminate future 7/8/7-flags confusion. BUG=chromium:971296 BRANCH=none TEST=make buildall -j Change-Id: I2fc3d1b52ce76184492b2aaff3060f486ca45f45 Signed-off-by: Denis Brockus <dbrockus@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1699893 Reviewed-by: Jack Rosenthal <jrosenth@chromium.org>
Diffstat (limited to 'chip/stm32/i2c-stm32f4.c')
-rw-r--r--chip/stm32/i2c-stm32f4.c73
1 files changed, 41 insertions, 32 deletions
diff --git a/chip/stm32/i2c-stm32f4.c b/chip/stm32/i2c-stm32f4.c
index ee6460936c..6b774e829b 100644
--- a/chip/stm32/i2c-stm32f4.c
+++ b/chip/stm32/i2c-stm32f4.c
@@ -25,7 +25,7 @@
/* Transmit timeout in microseconds */
#define I2C_TX_TIMEOUT_MASTER (10 * MSEC)
-#ifdef CONFIG_HOSTCMD_I2C_SLAVE_ADDR
+#ifdef CONFIG_HOSTCMD_I2C_SLAVE_ADDR__7BF
#if (I2C_PORT_EC == STM32_I2C1_PORT)
#define IRQ_SLAVE_EV STM32_IRQ_I2C1_EV
#define IRQ_SLAVE_ER STM32_IRQ_I2C1_ER
@@ -171,7 +171,7 @@ static int wait_sr1(int port, int mask)
*
* @return Non-zero if error.
*/
-static int send_start(int port, int slave_addr)
+static int send_start__8b(const int port, const uint16_t slave_addr__8b)
{
int rv;
@@ -182,7 +182,7 @@ static int send_start(int port, int slave_addr)
return I2C_ERROR_FAILED_START;
/* Write slave address */
- STM32_I2C_DR(port) = slave_addr & 0xff;
+ STM32_I2C_DR(port) = slave_addr__8b;
rv = wait_sr1_poll(port, STM32_I2C_SR1_ADDR, SET, 1);
if (rv)
return rv;
@@ -263,7 +263,8 @@ static int wait_fmpi2c_isr(int port, int mask)
*
* @return Non-zero if error.
*/
-static int send_fmpi2c_start(int port, int slave_addr, int size, int is_read)
+static int send_fmpi2c_start__8b(const int port, const uint16_t slave_addr__8b,
+ int size, int is_read)
{
uint32_t reg;
@@ -273,7 +274,7 @@ static int send_fmpi2c_start(int port, int slave_addr, int size, int is_read)
FMPI2C_CR2_RELOAD | FMPI2C_CR2_AUTOEND |
FMPI2C_CR2_RD_WRN | FMPI2C_CR2_START | FMPI2C_CR2_STOP);
reg |= FMPI2C_CR2_START | FMPI2C_CR2_AUTOEND |
- FMPI2C_CR2_SADD(slave_addr) | FMPI2C_CR2_SIZE(size) |
+ slave_addr__8b | FMPI2C_CR2_SIZE(size) |
(is_read ? FMPI2C_CR2_RD_WRN : 0);
STM32_FMPI2C_CR2(port) = reg;
@@ -400,8 +401,9 @@ static void fmpi2c_clear_regs(int port)
*
* @return EC_SUCCESS on success.
*/
-static int chip_fmpi2c_xfer(int port, int slave_addr, const uint8_t *out,
- int out_bytes, uint8_t *in, int in_bytes, int flags)
+static int chip_fmpi2c_xfer__8b(const int port, const uint16_t slave_addr__8b,
+ const uint8_t *out, int out_bytes,
+ uint8_t *in, int in_bytes, int flags)
{
int started = (flags & I2C_XFER_START) ? 0 : 1;
int rv = EC_SUCCESS;
@@ -420,8 +422,8 @@ static int chip_fmpi2c_xfer(int port, int slave_addr, const uint8_t *out,
/* No out bytes and no in bytes means just check for active */
if (out_bytes || !in_bytes) {
- rv = send_fmpi2c_start(
- port, slave_addr, out_bytes, FMPI2C_WRITE);
+ rv = send_fmpi2c_start__8b(
+ port, slave_addr__8b, out_bytes, FMPI2C_WRITE);
if (rv)
goto xfer_exit;
@@ -446,8 +448,8 @@ static int chip_fmpi2c_xfer(int port, int slave_addr, const uint8_t *out,
dma_start_rx(dma, in_bytes, in);
i2c_dma_enable_tc_interrupt(dma->channel, port);
- rv_start = send_fmpi2c_start(
- port, slave_addr, in_bytes, FMPI2C_READ);
+ rv_start = send_fmpi2c_start__8b(
+ port, slave_addr__8b, in_bytes, FMPI2C_READ);
if (rv_start)
goto xfer_exit;
@@ -551,9 +553,11 @@ static void i2c_clear_regs(int port)
*/
/* Perform an i2c transaction. */
-int chip_i2c_xfer(int port, int slave_addr, const uint8_t *out, int out_bytes,
+int chip_i2c_xfer__7bf(const int port, const uint16_t slave_addr__7bf,
+ const uint8_t *out, int out_bytes,
uint8_t *in, int in_bytes, int flags)
{
+ int addr__8b = I2C_GET_ADDR__7b(slave_addr__7bf) << 1;
int started = (flags & I2C_XFER_START) ? 0 : 1;
int rv = EC_SUCCESS;
int i;
@@ -564,15 +568,16 @@ int chip_i2c_xfer(int port, int slave_addr, const uint8_t *out, int out_bytes,
ASSERT(!started);
if (p->port == STM32F4_FMPI2C_PORT) {
- return chip_fmpi2c_xfer(port, slave_addr, out, out_bytes,
- in, in_bytes, flags);
+ return chip_fmpi2c_xfer__8b(port, addr__8b,
+ out, out_bytes,
+ in, in_bytes, flags);
}
i2c_clear_regs(port);
/* No out bytes and no in bytes means just check for active */
if (out_bytes || !in_bytes) {
- rv = send_start(port, slave_addr);
+ rv = send_start__8b(port, addr__8b);
if (rv)
goto xfer_exit;
@@ -611,7 +616,7 @@ int chip_i2c_xfer(int port, int slave_addr, const uint8_t *out, int out_bytes,
STM32_I2C_CR2(port) |= STM32_I2C_CR2_LAST;
STM32_I2C_CR2(port) |= STM32_I2C_CR2_DMAEN;
- rv_start = send_start(port, slave_addr | 0x01);
+ rv_start = send_start__8b(port, addr__8b | 0x01);
if ((in_bytes == 1) && (flags & I2C_XFER_STOP))
STM32_I2C_CR1(port) |= STM32_I2C_CR1_STOP;
@@ -755,7 +760,7 @@ DECLARE_HOOK(HOOK_FREQ_CHANGE, i2c_freq_change_hook, HOOK_PRIO_DEFAULT);
/*****************************************************************************/
/* Slave */
-#ifdef CONFIG_HOSTCMD_I2C_SLAVE_ADDR
+#ifdef CONFIG_HOSTCMD_I2C_SLAVE_ADDR__7BF
/* Host command slave */
/*
* Buffer for received host command packets (including prefix byte on request,
@@ -834,7 +839,7 @@ static void i2c_process_command(void)
host_packet_receive(&i2c_packet);
}
-#ifdef CONFIG_BOARD_I2C_SLAVE_ADDR
+#ifdef CONFIG_BOARD_I2C_SLAVE_ADDR__7BF
static void i2c_send_board_response(int len)
{
/* host_buffer data range, beyond this length, will return 0xec */
@@ -858,7 +863,7 @@ static void i2c_event_handler(int port)
volatile uint32_t i2c_sr2;
volatile uint32_t i2c_sr1;
static int rx_pending, buf_idx;
- static uint16_t addr;
+ static uint16_t addr__8b;
volatile uint32_t dummy __attribute__((unused));
@@ -883,15 +888,15 @@ static void i2c_event_handler(int port)
/* Transfer matched our slave address */
if (i2c_sr1 & STM32_I2C_SR1_ADDR) {
- addr = ((i2c_sr2 & STM32_I2C_SR2_DUALF) ?
+ addr__8b = ((i2c_sr2 & STM32_I2C_SR2_DUALF) ?
STM32_I2C_OAR2(port) : STM32_I2C_OAR1(port)) & 0xfe;
if (i2c_sr2 & STM32_I2C_SR2_TRA) {
/* Transmitter slave */
i2c_sr1 |= STM32_I2C_SR1_TXE;
-#ifdef CONFIG_BOARD_I2C_SLAVE_ADDR
+#ifdef CONFIG_BOARD_I2C_SLAVE_ADDR__7BF
if (!rx_pending && !tx_pending) {
tx_pending = 1;
- i2c_process_board_command(1, addr, 0);
+ i2c_process_board_command(1, addr__8b, 0);
}
#endif
} else {
@@ -926,9 +931,11 @@ static void i2c_event_handler(int port)
host_i2c_resp_port = port;
/* Disable buffer interrupt */
STM32_I2C_CR2(port) &= ~STM32_I2C_CR2_ITBUFEN;
-#ifdef CONFIG_BOARD_I2C_SLAVE_ADDR
- if (addr == CONFIG_BOARD_I2C_SLAVE_ADDR)
- i2c_process_board_command(1, addr,
+#ifdef CONFIG_BOARD_I2C_SLAVE_ADDR__7BF
+ if ((addr__8b >> 1) ==
+ I2C_GET_ADDR__7b(
+ CONFIG_BOARD_I2C_SLAVE_ADDR__7BF))
+ i2c_process_board_command(1, addr__8b,
buf_idx);
else
#endif
@@ -950,9 +957,11 @@ static void i2c_event_handler(int port)
/* Disable buffer interrupt */
STM32_I2C_CR2(port) &= ~STM32_I2C_CR2_ITBUFEN;
-#ifdef CONFIG_BOARD_I2C_SLAVE_ADDR
- if (rx_pending && addr == CONFIG_BOARD_I2C_SLAVE_ADDR)
- i2c_process_board_command(0, addr, buf_idx);
+#ifdef CONFIG_BOARD_I2C_SLAVE_ADDR__7BF
+ if (rx_pending &&
+ (addr__8b >> 1) ==
+ I2C_GET_ADDR__7b(CONFIG_BOARD_I2C_SLAVE_ADDR__7BF))
+ i2c_process_board_command(0, addr__8b, buf_idx);
#endif
rx_pending = 0;
tx_pending = 0;
@@ -987,7 +996,7 @@ static void i2c_init(void)
i2c_init_port(p);
-#ifdef CONFIG_HOSTCMD_I2C_SLAVE_ADDR
+#ifdef CONFIG_HOSTCMD_I2C_SLAVE_ADDR__7BF
/* Enable ACK */
STM32_I2C_CR1(I2C_PORT_EC) |= STM32_I2C_CR1_ACK;
/* Enable interrupts */
@@ -995,10 +1004,10 @@ static void i2c_init(void)
| STM32_I2C_CR2_ITERREN;
/* Setup host command slave */
STM32_I2C_OAR1(I2C_PORT_EC) = STM32_I2C_OAR1_B14
- | CONFIG_HOSTCMD_I2C_SLAVE_ADDR;
-#ifdef CONFIG_BOARD_I2C_SLAVE_ADDR
+ | (I2C_GET_ADDR__7b(CONFIG_HOSTCMD_I2C_SLAVE_ADDR__7BF) << 1);
+#ifdef CONFIG_BOARD_I2C_SLAVE_ADDR__7BF
STM32_I2C_OAR2(I2C_PORT_EC) = STM32_I2C_OAR2_ENDUAL
- | CONFIG_BOARD_I2C_SLAVE_ADDR;
+ | (I2C_GET_ADDR__7b(CONFIG_BOARD_I2C_SLAVE_ADDR__7BF) << 1);
#endif
task_enable_irq(IRQ_SLAVE_EV);
task_enable_irq(IRQ_SLAVE_ER);