diff options
| author | Shawn Nematbakhsh <shawnn@chromium.org> | 2018-01-24 15:07:43 -0800 |
|---|---|---|
| committer | chrome-bot <chrome-bot@chromium.org> | 2018-01-30 14:54:17 -0800 |
| commit | 8d29b3dae79d48c67d796c3892185c17d84d074a (patch) | |
| tree | df043e57d22d09e4556b80d37e9c3133718b0be4 /chip/stm32/registers.h | |
| parent | 9362b0620159acadc5f8231407acca746c1d2c39 (diff) | |
| download | chrome-ec-8d29b3dae79d48c67d796c3892185c17d84d074a.tar.gz | |
stm32: Fix bkpdata accounting
stm32f0 has 20 bytes (not 20 words) of VBAT-backed RAM. Make more
efficient use of our limited storage to prevent trying to use storage
that doesn't exist.
BUG=b:71333840
BRANCH=None
TEST=Negotiate PD, run "reboot" on scarlet EC console, verify reset path
is taken in pd_partner_port_reset().
Signed-off-by: Shawn Nematbakhsh <shawnn@chromium.org>
Change-Id: Ie4c303b74a1b82b84ec971cdcc19c2b21a0032e7
Reviewed-on: https://chromium-review.googlesource.com/885461
Commit-Ready: Shawn N <shawnn@chromium.org>
Tested-by: Shawn N <shawnn@chromium.org>
Reviewed-by: Vincent Palatin <vpalatin@chromium.org>
Diffstat (limited to 'chip/stm32/registers.h')
| -rw-r--r-- | chip/stm32/registers.h | 10 |
1 files changed, 7 insertions, 3 deletions
diff --git a/chip/stm32/registers.h b/chip/stm32/registers.h index 2fc4fb3568..76b89e9f23 100644 --- a/chip/stm32/registers.h +++ b/chip/stm32/registers.h @@ -1567,10 +1567,14 @@ typedef volatile struct timer_ctlr timer_ctlr_t; #define STM32_RTC_BACKUP(n) REG32(STM32_RTC_BASE + 0x50 + 4 * (n)) #define STM32_BKP_DATA(n) STM32_RTC_BACKUP(n) -#if defined(CHIP_FAMILY_STM32F3) || defined(CHIP_FAMILY_STM32H7) -#define STM32_BKP_ENTRIES 32 +#if defined(CHIP_FAMILY_STM32H7) || defined(CHIP_FAMILY_STM32L4) +#define STM32_BKP_BYTES 128 +#elif defined(CHIP_FAMILY_STM32F4) || defined(CHIP_FAMILY_STM32L) +#define STM32_BKP_BYTES 80 +#elif defined(CHIP_FAMILY_STM32F3) +#define STM32_BKP_BYTES 64 #else -#define STM32_BKP_ENTRIES 20 +#define STM32_BKP_BYTES 20 #endif #else |