diff options
| author | Wei-Han Chen <stimim@google.com> | 2018-01-08 16:51:26 +0800 |
|---|---|---|
| committer | chrome-bot <chrome-bot@chromium.org> | 2018-01-25 00:15:48 -0800 |
| commit | 9a7e82bac8f8fbfa10e0e2a1f1ea33fb1d6b75cc (patch) | |
| tree | 0834587dfa4a95ed38fed2974b470beaa862ca5b /chip/stm32/registers.h | |
| parent | e68469b5242b9b95ea5de45c965825da35b7eaab (diff) | |
| download | chrome-ec-9a7e82bac8f8fbfa10e0e2a1f1ea33fb1d6b75cc.tar.gz | |
stm32: make half-duplex SPI works on STM32F0
According to RM0091, steps for using DMA for SPI peripheral should be:
1. enable DMA RX / TX
2. enable SPI
3. wait for DMA to complete
4. disable DMA RX / TX
5. disable SPI
BUG=b:70482333
TEST=tested on reworked staff (half-duplex)
TEST=tested elm (full-duplex)
Change-Id: I095409195cd1e0379995f0bfa6605c2e1a0dfd3c
Reviewed-on: https://chromium-review.googlesource.com/853715
Commit-Ready: Wei-Han Chen <stimim@chromium.org>
Tested-by: Wei-Han Chen <stimim@chromium.org>
Reviewed-by: Nicolas Boichat <drinkcat@chromium.org>
Diffstat (limited to 'chip/stm32/registers.h')
| -rw-r--r-- | chip/stm32/registers.h | 7 |
1 files changed, 4 insertions, 3 deletions
diff --git a/chip/stm32/registers.h b/chip/stm32/registers.h index df9b83b3d8..2fc4fb3568 100644 --- a/chip/stm32/registers.h +++ b/chip/stm32/registers.h @@ -1660,12 +1660,13 @@ typedef volatile struct stm32_spi_regs stm32_spi_regs_t; #define STM32_SPI_CR1_CPOL (1 << 1) #define STM32_SPI_CR1_CPHA (1 << 0) #define STM32_SPI_CR2_FRXTH (1 << 12) -#define STM32_SPI_CR2_NSSP (1 << 3) +#define STM32_SPI_CR2_DATASIZE(n) (((n) - 1) << 8) +#define STM32_SPI_CR2_TXEIE (1 << 7) #define STM32_SPI_CR2_RXNEIE (1 << 6) -#define STM32_SPI_CR2_RXDMAEN (1 << 0) +#define STM32_SPI_CR2_NSSP (1 << 3) #define STM32_SPI_CR2_SSOE (1 << 2) #define STM32_SPI_CR2_TXDMAEN (1 << 1) -#define STM32_SPI_CR2_DATASIZE(n) (((n) - 1) << 8) +#define STM32_SPI_CR2_RXDMAEN (1 << 0) #define STM32_SPI_SR_RXNE (1 << 0) #define STM32_SPI_SR_TXE (1 << 1) |