diff options
| author | Vincent Palatin <vpalatin@chromium.org> | 2013-06-05 17:15:05 -0700 |
|---|---|---|
| committer | chrome-internal-fetch <chrome-internal-fetch@google.com> | 2014-06-18 06:08:45 +0000 |
| commit | 5fa52a895b6acd5d976a24dd571a44eaa3cb1ad1 (patch) | |
| tree | 667ccc50249a31eec51199811b9fd3780ba52729 /chip/stm32/registers.h | |
| parent | 4957dcbd87cd75d91bca772fef93ec2e0256ea4f (diff) | |
| download | chrome-ec-5fa52a895b6acd5d976a24dd571a44eaa3cb1ad1.tar.gz | |
stm32: add USB driver
Enough USB support to be able to enumerate the device and use bulk or
interrupt endpoints.
Signed-off-by: Vincent Palatin <vpalatin@chromium.org>
BRANCH=none
BUG=chrome-os-partner:28295
TEST=with the following USB console CL, connect a Fruitpie through USB
and use its console over USB.
Change-Id: I37b7f3b6a754cb82ab5f940ea20122d2e16b3b5b
Reviewed-on: https://chromium-review.googlesource.com/193983
Tested-by: Vincent Palatin <vpalatin@chromium.org>
Reviewed-by: Todd Broch <tbroch@chromium.org>
Commit-Queue: Vincent Palatin <vpalatin@chromium.org>
Diffstat (limited to 'chip/stm32/registers.h')
| -rw-r--r-- | chip/stm32/registers.h | 40 |
1 files changed, 38 insertions, 2 deletions
diff --git a/chip/stm32/registers.h b/chip/stm32/registers.h index 4e9dbd1419..c21dc50754 100644 --- a/chip/stm32/registers.h +++ b/chip/stm32/registers.h @@ -46,6 +46,7 @@ #define STM32_IRQ_USB 31 /* aliases for easier code sharing */ #define STM32_IRQ_COMP STM32_IRQ_ADC_COMP +#define STM32_IRQ_USB_LP STM32_IRQ_USB #else /* !CHIP_FAMILY_STM32F0 */ #define STM32_IRQ_WWDG 0 @@ -526,6 +527,7 @@ typedef volatile struct timer_ctlr timer_ctlr_t; #define STM32_RCC_PB2_TIM9 (1 << 2) #define STM32_RCC_PB2_TIM10 (1 << 3) #define STM32_RCC_PB2_TIM11 (1 << 4) +#define STM32_RCC_PB1_USB (1 << 23) #define STM32_SYSCFG_BASE 0x40010000 @@ -558,6 +560,7 @@ typedef volatile struct timer_ctlr timer_ctlr_t; #define STM32_RCC_PB2_PMAD (1 << 11) /* STM32TS */ #define STM32_RCC_PB2_PMSE (1 << 13) /* STM32TS */ #define STM32_RCC_PB1_TIM14 (1 << 8) /* STM32F0XX */ +#define STM32_RCC_PB1_USB (1 << 23) #define STM32_SYSCFG_BASE 0x40010000 @@ -1212,6 +1215,41 @@ typedef volatile struct stm32_dma_regs stm32_dma_regs_t; #define STM32_PMSE_MRCR REG32(STM32_PMSE_BASE + 0x100) #define STM32_PMSE_MCCR REG32(STM32_PMSE_BASE + 0x104) +/* --- USB --- */ +#define STM32_USB_CAN_SRAM_BASE 0x40006000 +#define STM32_USB_FS_BASE 0x40005C00 + +#define STM32_USB_EP(n) REG16(STM32_USB_FS_BASE + (n) * 4) + +#define STM32_USB_CNTR REG16(STM32_USB_FS_BASE + 0x40) +#define STM32_USB_ISTR REG16(STM32_USB_FS_BASE + 0x44) +#define STM32_USB_FNR REG16(STM32_USB_FS_BASE + 0x48) +#define STM32_USB_DADDR REG16(STM32_USB_FS_BASE + 0x4C) +#define STM32_USB_BTABLE REG16(STM32_USB_FS_BASE + 0x50) +#define STM32_USB_LPMCSR REG16(STM32_USB_FS_BASE + 0x54) +#define STM32_USB_BCDR REG16(STM32_USB_FS_BASE + 0x58) + +#define EP_MASK 0x0F0F +#define EP_TX_MASK 0x0030 +#define EP_TX_VALID 0x0030 +#define EP_TX_NAK 0x0020 +#define EP_TX_STALL 0x0010 +#define EP_TX_DISAB 0x0000 +#define EP_RX_MASK 0x3000 +#define EP_RX_VALID 0x3000 +#define EP_RX_NAK 0x2000 +#define EP_RX_STALL 0x1000 +#define EP_RX_DISAB 0x0000 + +#define EP_STATUS_OUT 0x0100 + +#define EP_TX_RX_MASK (EP_TX_MASK | EP_RX_MASK) +#define EP_TX_RX_VALID (EP_TX_VALID | EP_RX_VALID) + +#define STM32_TOGGLE_EP(n, mask, val, flags) \ + STM32_USB_EP(n) = (((STM32_USB_EP(n) & (EP_MASK | (mask))) \ + ^ (val)) | (flags)) + /* --- MISC --- */ #define STM32_CEC_BASE 0x40007800 /* STM32F100 only */ @@ -1222,7 +1260,5 @@ typedef volatile struct stm32_dma_regs stm32_dma_regs_t; #define STM32_SDIO_BASE 0x40018000 /* STM32F10x only */ #define STM32_BXCAN1_BASE 0x40006400 /* STM32F10x only */ #define STM32_BXCAN2_BASE 0x40006800 /* STM32F10x only */ -#define STM32_USB_CAN_SRAM_BASE 0x40006000 /* STM32F10x only */ -#define STM32_USB_FS_BASE 0x40005C00 /* STM32F10x only */ #endif /* __CROS_EC_REGISTERS_H */ |