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| author | Nicolas Boichat <drinkcat@google.com> | 2017-02-22 16:47:27 +0800 |
|---|---|---|
| committer | chrome-bot <chrome-bot@chromium.org> | 2017-03-01 07:25:03 -0800 |
| commit | b8c255484c59161217becdc29e353424d1f7a364 (patch) | |
| tree | 9599cc58c41139ddfcae5f8e39dd36ac797cfedb /chip/stm32/registers.h | |
| parent | c425cbae0be48cf9a9a5b30610c282ced1328d70 (diff) | |
| download | chrome-ec-b8c255484c59161217becdc29e353424d1f7a364.tar.gz | |
stm32/usb: Add support for USB suspend
This follows the basics of what is decribed in
RM0091 Reference Manual 30.5.5 Suspend/Resume events .
We call enable/disable_sleep at suspend/resume, to make
sure the EC stays awake when USB is connected and active.
We also call clock_enable/disable_module, which is stubbed on
stm32f0, but can be used on other devices in the family.
This also fixes interrupt handling in usb_interrupt, by only
clearing interrupt bits that were handled instead of resetting
them all, which is racy, and can potentially lead to issues
if reset comes soon after a resume event.
BRANCH=none
BUG=chrome-os-partner:62325
TEST=build and flash hammer, connect to chell, suspend/resume,
and see that hammer prints USB suspend and USB resume lines.
Change-Id: Ie9d02fd4a114add3ebc98dc9393680bc9a64a522
Reviewed-on: https://chromium-review.googlesource.com/446239
Commit-Ready: Nicolas Boichat <drinkcat@chromium.org>
Tested-by: Nicolas Boichat <drinkcat@chromium.org>
Reviewed-by: Vincent Palatin <vpalatin@chromium.org>
Diffstat (limited to 'chip/stm32/registers.h')
| -rw-r--r-- | chip/stm32/registers.h | 4 |
1 files changed, 4 insertions, 0 deletions
diff --git a/chip/stm32/registers.h b/chip/stm32/registers.h index 57193b08af..4f79beb769 100644 --- a/chip/stm32/registers.h +++ b/chip/stm32/registers.h @@ -2157,6 +2157,10 @@ typedef volatile struct stm32_dma_regs stm32_dma_regs_t; #define STM32_USB_ISTR_CTR (1 << 15) #define STM32_USB_FNR REG16(STM32_USB_FS_BASE + 0x48) + +#define STM32_USB_FNR_RXDP_RXDM_SHIFT (14) +#define STM32_USB_FNR_RXDP_RXDM_MASK (3 << STM32_USB_FNR_RXDP_RXDM_SHIFT) + #define STM32_USB_DADDR REG16(STM32_USB_FS_BASE + 0x4C) #define STM32_USB_BTABLE REG16(STM32_USB_FS_BASE + 0x50) #define STM32_USB_LPMCSR REG16(STM32_USB_FS_BASE + 0x54) |