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authorAnton Staaf <robotboy@chromium.org>2016-01-25 09:53:49 -0800
committerchrome-bot <chrome-bot@chromium.org>2016-01-27 08:44:22 -0800
commit0801ac67b9310ff6d75e57430235857ecd3ce0a0 (patch)
tree0bde99a5a173a82c3fd4b92de996adb987ff5097 /chip/stm32/spi.c
parent28eb4788810c7a7fc697f61fe837166cd7c68c29 (diff)
downloadchrome-ec-0801ac67b9310ff6d75e57430235857ecd3ce0a0.tar.gz
GPIO: Remove gpio_get_level_reg function
After talking with Simon Glass about this we concluded that this was an optimization that is not needed, as such, and since it is only used in one location and only available from one chip family I'm removing it. This further simplifies the GPIO API and removes more uses of port/mask pairs. Signed-off-by: Anton Staaf <robotboy@chromium.org> BRANCH=None BUG=None TEST=make buildall -j Change-Id: I40754a385e0a4fa3a56d67fca1dd59fc8f3cc85a Reviewed-on: https://chromium-review.googlesource.com/323827 Commit-Ready: Anton Staaf <robotboy@chromium.org> Tested-by: Anton Staaf <robotboy@chromium.org> Reviewed-by: Randall Spangler <rspangler@chromium.org>
Diffstat (limited to 'chip/stm32/spi.c')
-rw-r--r--chip/stm32/spi.c21
1 files changed, 8 insertions, 13 deletions
diff --git a/chip/stm32/spi.c b/chip/stm32/spi.c
index 2218df6f66..8f905d3855 100644
--- a/chip/stm32/spi.c
+++ b/chip/stm32/spi.c
@@ -153,12 +153,11 @@ enum spi_state {
*
* @param rxdma RX DMA channel to watch
* @param needed Number of bytes that are needed
- * @param nss_regs GPIO register for NSS control line
- * @param nss_mask Bit to check in GPIO register (when high, we abort)
+ * @param nss GPIO signal for NSS control line
* @return 0 if bytes received, -1 if we hit a timeout or NSS went high
*/
static int wait_for_bytes(stm32_dma_chan_t *rxdma, int needed,
- uint16_t *nss_reg, uint32_t nss_mask)
+ enum gpio_signal nss)
{
timestamp_t deadline;
@@ -167,7 +166,7 @@ static int wait_for_bytes(stm32_dma_chan_t *rxdma, int needed,
while (1) {
if (dma_bytes_done(rxdma, sizeof(in_msg)) >= needed)
return 0;
- if (REG16(nss_reg) & nss_mask)
+ if (gpio_get_level(nss))
return -1;
if (!deadline.val) {
deadline = get_time();
@@ -438,8 +437,6 @@ static void spi_send_response_packet(struct host_packet *pkt)
void spi_event(enum gpio_signal signal)
{
stm32_dma_chan_t *rxdma;
- uint16_t *nss_reg;
- uint32_t nss_mask;
uint16_t i;
/* If not enabled, ignore glitches on NSS */
@@ -447,8 +444,7 @@ void spi_event(enum gpio_signal signal)
return;
/* Check chip select. If it's high, the AP ended a transaction. */
- nss_reg = gpio_get_level_reg(GPIO_SPI1_NSS, &nss_mask);
- if (REG16(nss_reg) & nss_mask) {
+ if (gpio_get_level(GPIO_SPI1_NSS)) {
enable_sleep(SLEEP_MASK_SPI);
/*
@@ -484,7 +480,7 @@ void spi_event(enum gpio_signal signal)
rxdma = dma_get_channel(STM32_DMAC_SPI1_RX);
/* Wait for version, command, length bytes */
- if (wait_for_bytes(rxdma, 3, nss_reg, nss_mask))
+ if (wait_for_bytes(rxdma, 3, GPIO_SPI1_NSS))
goto spi_event_error;
if (in_msg[0] == EC_HOST_REQUEST_VERSION) {
@@ -493,7 +489,7 @@ void spi_event(enum gpio_signal signal)
int pkt_size;
/* Wait for the rest of the command header */
- if (wait_for_bytes(rxdma, sizeof(*r), nss_reg, nss_mask))
+ if (wait_for_bytes(rxdma, sizeof(*r), GPIO_SPI1_NSS))
goto spi_event_error;
/*
@@ -506,7 +502,7 @@ void spi_event(enum gpio_signal signal)
goto spi_event_error;
/* Wait for the packet data */
- if (wait_for_bytes(rxdma, pkt_size, nss_reg, nss_mask))
+ if (wait_for_bytes(rxdma, pkt_size, GPIO_SPI1_NSS))
goto spi_event_error;
spi_packet.send_response = spi_send_response_packet;
@@ -552,8 +548,7 @@ void spi_event(enum gpio_signal signal)
args.params_size = in_msg[2];
/* Wait for parameters */
- if (wait_for_bytes(rxdma, 3 + args.params_size,
- nss_reg, nss_mask))
+ if (wait_for_bytes(rxdma, 3 + args.params_size, GPIO_SPI1_NSS))
goto spi_event_error;
/*