Merge remote-tracking branch cros/main into firmware-fpmcu-dartmonkey-releasefirmware-fpmcu-dartmonkey-release

Generated by: ./util/update_release_branch.py --board dartmonkey --relevant_paths_file
./util/fingerprint-relevant-paths.txt firmware-fpmcu-dartmonkey-release

Relevant changes:

git log --oneline 6c1587ca70..28712dae9d -- board/nocturne_fp
board/dartmonkey common/fpsensor docs/fingerprint driver/fingerprint
util/getversion.sh

ded9307b79 util/getversion.sh: Fix version when not in a git repo
956055e692 board: change Google USB vendor info
71b2ef709d Update license boilerplate text in source code files
33e11afda0 Revert "fpsensor: Build fpsensor source file with C++"
c8d0360723 fpsensor: Build fpsensor source file with C++
bc113abd53 fpsensor: Fix g++ compiler error
150a58a0dc fpsensor: Fix fp_set_sensor_mode return type
b33b5ce85b fpsensor: Remove nested designators for C++ compatibility
2e864b2539 tree-wide: const-ify argv for console commands
56d8b360f9 test: Add test for get ikm failure when seed not set
3a3d6c3690 test: Add test for fpsensor trivial key failure
233e6bbd08 fpsensor_crypto: Abstract calls to hmac_SHA256
0a041b285b docs/fingerprint: Typo correction
c03fab67e2 docs/fingerprint: Fix the path of fputils.py
0b5d4baf5a util/getversion.sh: Fix empty file list handling
6e128fe760 FPMCU dev board environment with Satlab
3eb29b6aa5 builtin: Move ssize_t to sys/types.h
345d62ebd1 docs/fingerprint: Update power numbers for latest dartmonkey release
c25ffdb316 common: Conditionally support printf %l and %i modifiers
9a3c514b45 test: Add a test to check if the debugger is connected
54e603413f Move standard library tests to their own file
43fa6b4bf8 docs/fingerprint: Update power numbers for latest bloonchipper release
25536f9a84 driver/fingerprint/fpc/bep/fpc_sensor_spi.c: Format with clang-format
4face99efd driver/fingerprint/fpc/libfp/fpc_sensor_pal.h: Format with clang-format
738de2b575 trng: Rename rand to trng_rand
14b8270edd docs/fingerprint: Update dragonclaw power numbers
0b268f93d1 driver/fingerprint/fpc/libfp/fpc_private.c: Format with clang-format
f80da163f2 driver/fingerprint/fpc/libfp/fpc_private.h: Format with clang-format
a0751778f4 board/nocturne_fp/ro_workarounds.c: Format with clang-format
5e9c85c9b1 driver/fingerprint/fpc/libfp/fpc_sensor_pal.c: Format with clang-format
c1f9dd3cf8 driver/fingerprint/fpc/libfp/fpc_bio_algorithm.h: Format with clang-format
eb1e1bed8d driver/fingerprint/fpc/libfp/fpc1145_private.h: Format with clang-format
6e7b611821 driver/fingerprint/fpc/bep/fpc_bio_algorithm.h: Format with clang-format
e0589cd5e2 driver/fingerprint/fpc/bep/fpc1035_private.h: Format with clang-format
58f0246dbe board/nocturne_fp/board_ro.c: Format with clang-format
7905e556a0 common/fpsensor/fpsensor_crypto.c: Format with clang-format
21289d170c driver/fingerprint/fpc/bep/fpc1025_private.h: Format with clang-format
98a20f937e common/fpsensor/fpsensor_state.c: Format with clang-format
a2d255d8af common/fpsensor/fpsensor.c: Format with clang-format
84e53a65da board/nocturne_fp/board.h: Format with clang-format
73055eeb3f driver/fingerprint/fpc/bep/fpc_private.c: Format with clang-format
0f7b5cb509 common/fpsensor/fpsensor_private.h: Format with clang-format
1ceade6e65 driver/fingerprint/fpc/bep/fpc_private.h: Format with clang-format
dca9d74321 Revert "trng: Rename rand to trng_rand"
a6b0b3554f trng: Rename rand to trng_rand
28d0b75b70 third_party/boringssl: Remove unused header

BRANCH=None
BUG=b:244387210 b:242720240 b:215613183 b:242720910 b:236386294
BUG=b:234181908 b:244781166 b:234781655 b:234143158 b:234181908
BUG=b:237344361 b:236025198 b:234181908 b:180945056 chromium:1098010
BUG=b:246424843 b:234181908 b:131913998
TEST=`make -j buildall`
TEST=./util/run_device_tests.py --board dartmonkey
     Test "aes": PASSED
     Test "cec": PASSED
     Test "cortexm_fpu": PASSED
     Test "crc": PASSED
     Test "flash_physical": PASSED
     Test "flash_write_protect": PASSED
     Test "fpsensor_hw": PASSED
     Test "fpsensor_spi_ro": PASSED
     Test "fpsensor_spi_rw": PASSED
     Test "fpsensor_uart_ro": PASSED
     Test "fpsensor_uart_rw": PASSED
     Test "mpu_ro": PASSED
     Test "mpu_rw": PASSED
     Test "mutex": PASSED
     Test "pingpong": PASSED
     Test "printf": PASSED
     Test "queue": PASSED
     Test "rollback_region0": PASSED
     Test "rollback_region1": PASSED
     Test "rollback_entropy": PASSED
     Test "rtc": PASSED
     Test "sha256": PASSED
     Test "sha256_unrolled": PASSED
     Test "static_if": PASSED
     Test "stdlib": PASSED
     Test "system_is_locked_wp_on": PASSED
     Test "system_is_locked_wp_off": PASSED
     Test "timer_dos": PASSED
     Test "utils": PASSED
     Test "utils_str": PASSED
     Test "panic_data_dartmonkey_v2.0.2887": PASSED
     Test "panic_data_nocturne_fp_v2.2.64": PASSED
     Test "panic_data_nami_fp_v2.2.144": PASSED
Force-Relevant-Builds: all
Signed-off-by: Tom Hughes <tomhughes@chromium.org>

Change-Id: I2c312583a709fedae8fe11d92c22328c3b634bc7

1 files changed, 49 insertions, 31 deletions

diff --git a/chip/stm32/usart-stm32l5.c b/chip/stm32/usart-stm32l5.c
index 2306f54606..30e0f009ff 100644
--- a/chip/stm32/usart-stm32l5.c
+++ b/chip/stm32/usart-stm32l5.c
@@ -1,4 +1,4 @@
-/* Copyright 2021 The Chromium OS Authors. All rights reserved.
+/* Copyright 2021 The ChromiumOS Authors
  * Use of this source code is governed by a BSD-style license that can be
  * found in the LICENSE file.
  */
@@ -17,13 +17,13 @@
  * each USART, an entry will be NULL if no USART driver is initialized for the
  * corresponding hardware instance.
  */
-#define STM32_USARTS_MAX 5
+#define STM32_USARTS_MAX 6
 
 static struct usart_config const *configs[STM32_USARTS_MAX];
 
 struct usart_configs usart_get_configs(void)
 {
-	return (struct usart_configs) {configs, ARRAY_SIZE(configs)};
+	return (struct usart_configs){ configs, ARRAY_SIZE(configs) };
 }
 
 static void usart_variant_enable(struct usart_config const *config)
@@ -52,18 +52,18 @@ static void usart_variant_disable(struct usart_config const *config)
 }
 
 static struct usart_hw_ops const usart_variant_hw_ops = {
-	.enable  = usart_variant_enable,
+	.enable = usart_variant_enable,
 	.disable = usart_variant_disable,
 };
 
 static void freq_change(void)
 {
-	size_t	i;
+	size_t i;
 
 	for (i = 0; i < ARRAY_SIZE(configs); ++i)
 		if (configs[i])
 			usart_set_baud_f0_l(configs[i], configs[i]->baud,
-					clock_get_freq());
+					    clock_get_freq());
 }
 
 DECLARE_HOOK(HOOK_FREQ_CHANGE, freq_change, HOOK_PRIO_DEFAULT);
@@ -79,12 +79,12 @@ void usart_clear_tc(struct usart_config const *config)
  */
 #if defined(CONFIG_STREAM_USART1)
 struct usart_hw_config const usart1_hw = {
-	.index          = 0,
-	.base           = STM32_USART1_BASE,
-	.irq            = STM32_IRQ_USART1,
+	.index = 0,
+	.base = STM32_USART1_BASE,
+	.irq = STM32_IRQ_USART1,
 	.clock_register = &STM32_RCC_APB2ENR,
-	.clock_enable   = STM32_RCC_PB2_USART1,
-	.ops            = &usart_variant_hw_ops,
+	.clock_enable = STM32_RCC_PB2_USART1,
+	.ops = &usart_variant_hw_ops,
 };
 
 static void usart1_interrupt(void)
@@ -97,12 +97,12 @@ DECLARE_IRQ(STM32_IRQ_USART1, usart1_interrupt, 2);
 
 #if defined(CONFIG_STREAM_USART2)
 struct usart_hw_config const usart2_hw = {
-	.index          = 1,
-	.base           = STM32_USART2_BASE,
-	.irq            = STM32_IRQ_USART2,
+	.index = 1,
+	.base = STM32_USART2_BASE,
+	.irq = STM32_IRQ_USART2,
 	.clock_register = &STM32_RCC_APB1ENR,
-	.clock_enable   = STM32_RCC_PB1_USART2,
-	.ops            = &usart_variant_hw_ops,
+	.clock_enable = STM32_RCC_PB1_USART2,
+	.ops = &usart_variant_hw_ops,
 };
 
 static void usart2_interrupt(void)
@@ -115,12 +115,12 @@ DECLARE_IRQ(STM32_IRQ_USART2, usart2_interrupt, 2);
 
 #if defined(CONFIG_STREAM_USART3)
 struct usart_hw_config const usart3_hw = {
-	.index          = 2,
-	.base           = STM32_USART3_BASE,
-	.irq            = STM32_IRQ_USART3,
+	.index = 2,
+	.base = STM32_USART3_BASE,
+	.irq = STM32_IRQ_USART3,
 	.clock_register = &STM32_RCC_APB1ENR,
-	.clock_enable   = STM32_RCC_PB1_USART3,
-	.ops            = &usart_variant_hw_ops,
+	.clock_enable = STM32_RCC_PB1_USART3,
+	.ops = &usart_variant_hw_ops,
 };
 
 static void usart3_interrupt(void)
@@ -133,12 +133,12 @@ DECLARE_IRQ(STM32_IRQ_USART3, usart3_interrupt, 2);
 
 #if defined(CONFIG_STREAM_USART4)
 struct usart_hw_config const usart4_hw = {
-	.index          = 3,
-	.base           = STM32_USART4_BASE,
-	.irq            = STM32_IRQ_USART4,
+	.index = 3,
+	.base = STM32_USART4_BASE,
+	.irq = STM32_IRQ_USART4,
 	.clock_register = &STM32_RCC_APB1ENR,
-	.clock_enable   = STM32_RCC_PB1_USART4,
-	.ops            = &usart_variant_hw_ops,
+	.clock_enable = STM32_RCC_PB1_USART4,
+	.ops = &usart_variant_hw_ops,
 };
 
 static void usart4_interrupt(void)
@@ -151,12 +151,12 @@ DECLARE_IRQ(STM32_IRQ_USART4, usart4_interrupt, 2);
 
 #if defined(CONFIG_STREAM_USART5)
 struct usart_hw_config const usart5_hw = {
-	.index          = 4,
-	.base           = STM32_USART5_BASE,
-	.irq            = STM32_IRQ_USART5,
+	.index = 4,
+	.base = STM32_USART5_BASE,
+	.irq = STM32_IRQ_USART5,
 	.clock_register = &STM32_RCC_APB1ENR,
-	.clock_enable   = STM32_RCC_PB1_USART5,
-	.ops            = &usart_variant_hw_ops,
+	.clock_enable = STM32_RCC_PB1_USART5,
+	.ops = &usart_variant_hw_ops,
 };
 
 static void usart5_interrupt(void)
@@ -166,3 +166,21 @@ static void usart5_interrupt(void)
 
 DECLARE_IRQ(STM32_IRQ_USART5, usart5_interrupt, 2);
 #endif
+
+#if defined(CONFIG_STREAM_USART9)
+struct usart_hw_config const usart9_hw = {
+	.index = 5,
+	.base = STM32_USART9_BASE,
+	.irq = STM32_IRQ_USART9,
+	.clock_register = &STM32_RCC_APB1ENR2,
+	.clock_enable = STM32_RCC_APB1ENR2_LPUART1EN,
+	.ops = &usart_variant_hw_ops,
+};
+
+static void usart9_interrupt(void)
+{
+	usart_interrupt(configs[5]);
+}
+
+DECLARE_IRQ(STM32_IRQ_USART9, usart9_interrupt, 2);
+#endif