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author | Bhanu Prakash Maiya <bhanumaiya@google.com> | 2020-04-30 15:26:52 -0700 |
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committer | Commit Bot <commit-bot@chromium.org> | 2020-06-05 10:06:44 +0000 |
commit | 86aacabcd3c2e496a43d291d9dee61e29edcc2d0 (patch) | |
tree | 5a87bbbee684ce95de718f654b0086abfa87daac /chip/stm32/usart_rx_interrupt-stm32f4.c | |
parent | bc96d7077db615d849d398115af76b7b85f63e01 (diff) | |
download | chrome-ec-86aacabcd3c2e496a43d291d9dee61e29edcc2d0.tar.gz |
Bloonchipper: USART based transport layer for host command
1. USART host command layer in chip/stm32
2. Fix usart implementation in stm32
BUG=b:147849609
BRANCH=none
TEST=1. make BOARD=bloonchipper -j
2. usart request and response works on dragonclaw
Change-Id: Idd89d3e490f23aa528ecaf6510c13d16b405de13
Signed-off-by: Bhanu Prakash Maiya <bhanumaiya@google.com>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2190531
Tested-by: Bhanu Prakash Maiya <bhanumaiya@chromium.org>
Reviewed-by: Jett Rink <jettrink@chromium.org>
Reviewed-by: Tom Hughes <tomhughes@chromium.org>
Reviewed-by: Craig Hesling <hesling@chromium.org>
Commit-Queue: Bhanu Prakash Maiya <bhanumaiya@chromium.org>
Auto-Submit: Bhanu Prakash Maiya <bhanumaiya@chromium.org>
Diffstat (limited to 'chip/stm32/usart_rx_interrupt-stm32f4.c')
-rw-r--r-- | chip/stm32/usart_rx_interrupt-stm32f4.c | 52 |
1 files changed, 52 insertions, 0 deletions
diff --git a/chip/stm32/usart_rx_interrupt-stm32f4.c b/chip/stm32/usart_rx_interrupt-stm32f4.c new file mode 100644 index 0000000000..bfbee469a6 --- /dev/null +++ b/chip/stm32/usart_rx_interrupt-stm32f4.c @@ -0,0 +1,52 @@ +/* Copyright 2020 The Chromium OS Authors. All rights reserved. + * Use of this source code is governed by a BSD-style license that can be + * found in the LICENSE file. + */ + +/* Interrupt based USART RX driver for STM32F0 and STM32F4 */ + +#include "usart.h" + +#include "atomic.h" +#include "common.h" +#include "queue.h" +#include "registers.h" + +static void usart_rx_init(struct usart_config const *config) +{ + intptr_t base = config->hw->base; + + STM32_USART_CR1(base) |= STM32_USART_CR1_RXNEIE; + STM32_USART_CR1(base) |= STM32_USART_CR1_RE; +#if defined(CHIP_FAMILY_STM32F0) || defined(CHIP_FAMILY_STM32F3) || \ + defined(CHIP_FAMILY_STM32L4) + STM32_USART_CR3(base) |= STM32_USART_CR3_OVRDIS; +#endif +} + +static void usart_rx_interrupt_handler(struct usart_config const *config) +{ + intptr_t base = config->hw->base; + int32_t status = STM32_USART_SR(base); + + if (status & STM32_USART_SR_RXNE) { + uint8_t byte = STM32_USART_RDR(base); + + if (!queue_add_unit(config->producer.queue, &byte)) + atomic_add(&config->state->rx_dropped, 1); + } +} + +struct usart_rx const usart_rx_interrupt = { + .producer_ops = { + /* + * Nothing to do here, we either had enough space in the queue + * when a character came in or we dropped it already. + */ + .read = NULL, + }, + + .init = usart_rx_init, + .interrupt = usart_rx_interrupt_handler, + .info = NULL, +}; |