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author | Yuval Peress <peress@chromium.org> | 2019-05-30 13:48:49 -0600 |
---|---|---|
committer | Commit Bot <commit-bot@chromium.org> | 2019-06-05 18:50:21 +0000 |
commit | b4f1c3ca375f6e3c50edae12c1713236a0bcd2cc (patch) | |
tree | 1723be9eda2e3ae36907c6d176c2e5768a53b550 /chip/stm32/usart_tx_dma.c | |
parent | 01fd86385bdcf633db0acd91b5f60733097a84a3 (diff) | |
download | chrome-ec-b4f1c3ca375f6e3c50edae12c1713236a0bcd2cc.tar.gz |
common: queue: Update chunk struct and get read/write logic
This change updates the queue_get_write_chunk and
queue_get_read_chunk logic to return an updated queue_chunk.
The new chunk uses a void * for the buffer and replaces length
with count. This more tightly aligns to how the rest of the
queue functions operate. Further, it adds the ability to
offset the write chunk. This is important as it allows wrapping.
For example:
With a queue of 8 units, 1 byte each. Assume H=2, T=5. Previously,
we were only able to ever get the 3 bytes at 5-7. Using the offset
of 3 though, we can now also get the 2 byte write chunk 0-1.
BUG=chromium:966506
BRANCH=None
TEST=Added unit tests
Change-Id: I40216c36aa0dc95ec4d15fc587d4b1f08a17ef73
Signed-off-by: Yuval Peress <peress@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1637415
Reviewed-by: Enrico Granata <egranata@chromium.org>
Reviewed-by: Jett Rink <jettrink@chromium.org>
Diffstat (limited to 'chip/stm32/usart_tx_dma.c')
-rw-r--r-- | chip/stm32/usart_tx_dma.c | 10 |
1 files changed, 5 insertions, 5 deletions
diff --git a/chip/stm32/usart_tx_dma.c b/chip/stm32/usart_tx_dma.c index 5989ccaa56..0c8e2c73d6 100644 --- a/chip/stm32/usart_tx_dma.c +++ b/chip/stm32/usart_tx_dma.c @@ -1,4 +1,4 @@ -/* Copyright (c) 2015 The Chromium OS Authors. All rights reserved. +/* Copyright 2015 The Chromium OS Authors. All rights reserved. * Use of this source code is governed by a BSD-style license that can be * found in the LICENSE file. */ @@ -51,9 +51,9 @@ static void usart_tx_dma_start(struct usart_config const *config, * that would hold up any additional writes to the TX queue * unnecessarily. */ - state->chunk.length = MIN(state->chunk.length, dma_config->max_bytes); + state->chunk.count = MIN(state->chunk.count, dma_config->max_bytes); - dma_prepare_tx(&options, state->chunk.length, state->chunk.buffer); + dma_prepare_tx(&options, state->chunk.count, state->chunk.buffer); state->dma_active = 1; @@ -90,11 +90,11 @@ void usart_tx_dma_interrupt(struct usart_config const *config) * units from the queue if we had an active DMA transfer. */ if (state->dma_active) - queue_advance_head(queue, state->chunk.length); + queue_advance_head(queue, state->chunk.count); state->chunk = queue_get_read_chunk(queue); - if (state->chunk.length) + if (state->chunk.count) usart_tx_dma_start(config, dma_config); else usart_tx_dma_stop(config, dma_config); |