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authorVincent Palatin <vpalatin@chromium.org>2018-03-02 11:17:11 +0100
committerchrome-bot <chrome-bot@chromium.org>2018-03-05 23:48:28 -0800
commitb42dd73603844c03b44d88a4513df330ee168496 (patch)
tree3fc605851bb6049e59fe44676c62c26db6e4a8fd /chip/stm32/usb.c
parent6d567bc45ffcc3b8df2c288f8347d00a250248fc (diff)
downloadchrome-ec-b42dd73603844c03b44d88a4513df330ee168496.tar.gz
core: add chip-specific memory regions definition mechanism
When a chip has special/non-contiguous SRAM physical memory region, rather than extending the generic linker file ad nauseam, define a mechanism to declare a chip specific list of those regions. To do so, a chip must declare the CONFIG_CHIP_MEMORY_REGIONS configuration and have a memory_regions.inc with the list of regions. The special-purpose preprocessed chip/<chip_name>/memory_regions.inc file has one region declaration per line using the following macro: REGION(name, attributes, start_address, size) Each region will get a proper MEMORY entry and a section in the linker file. the __SECTION(region_name) helper is provided as a convenience to declare variable in a specific region. Note: those 'special' regions are NOT cleared at startup contrary to .bss. Signed-off-by: Vincent Palatin <vpalatin@chromium.org> BRANCH=none BUG=b:67081508 TEST=on ZerbleBarn, along with the following CLs, run the firmware with large arrays in special AHB memory regions. Change-Id: I3f156ef6e5feb4a6a0b2ae2468bae8a20483f17c Reviewed-on: https://chromium-review.googlesource.com/946368 Commit-Ready: Vincent Palatin <vpalatin@chromium.org> Tested-by: Vincent Palatin <vpalatin@chromium.org> Reviewed-by: Randall Spangler <rspangler@chromium.org>
Diffstat (limited to 'chip/stm32/usb.c')
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