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| author | Alec Berg <alecaberg@chromium.org> | 2015-05-11 17:31:16 -0700 |
|---|---|---|
| committer | ChromeOS Commit Bot <chromeos-commit-bot@chromium.org> | 2015-05-27 02:39:41 +0000 |
| commit | 5b5f737d8f6f1be15d4ab5f42f290d20576307c4 (patch) | |
| tree | be384973f533436d9a53c46b742be35f5b377a4f /chip/stm32/usb_pd_phy.c | |
| parent | 25ce43fc3d35669500d74e44f3b7c96302ee2ade (diff) | |
| download | chrome-ec-5b5f737d8f6f1be15d4ab5f42f290d20576307c4.tar.gz | |
pd: move non-phy layer config out of usb_pd_config.h
Move parts of usb_pd_config.h that are not part of the phy layer
out of usb_pd_config.h and into board.h. This cleans up the
division between the TCPC and TCPM as only the TCPC needs to
use usb_pd_config.h.
Also cleans up the use of the CC detection voltage thresholds
by creating standard macros to use based on Rp strength for the
board.
BUG=none
BRANCH=none
TEST=make -j buildall
Change-Id: I946cceb38bea8233095b8a4b287102bb8a3a296d
Signed-off-by: Alec Berg <alecaberg@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/270337
Reviewed-by: Todd Broch <tbroch@chromium.org>
Reviewed-by: Vincent Palatin <vpalatin@chromium.org>
Diffstat (limited to 'chip/stm32/usb_pd_phy.c')
| -rw-r--r-- | chip/stm32/usb_pd_phy.c | 12 |
1 files changed, 6 insertions, 6 deletions
diff --git a/chip/stm32/usb_pd_phy.c b/chip/stm32/usb_pd_phy.c index 4fd495d769..e3156e79d6 100644 --- a/chip/stm32/usb_pd_phy.c +++ b/chip/stm32/usb_pd_phy.c @@ -70,14 +70,14 @@ static struct pd_physical { /* Pointers to timer register for each port */ timer_ctlr_t *tim_tx; timer_ctlr_t *tim_rx; -} pd_phy[PD_PORT_COUNT]; +} pd_phy[CONFIG_USB_PD_PORT_COUNT]; /* keep track of RX edge timing in order to trigger receive */ -static timestamp_t rx_edge_ts[PD_PORT_COUNT][PD_RX_TRANSITION_COUNT]; -static int rx_edge_ts_idx[PD_PORT_COUNT]; +static timestamp_t rx_edge_ts[CONFIG_USB_PD_PORT_COUNT][PD_RX_TRANSITION_COUNT]; +static int rx_edge_ts_idx[CONFIG_USB_PD_PORT_COUNT]; /* keep track of transmit polarity for DMA interrupt */ -static int tx_dma_polarities[PD_PORT_COUNT]; +static int tx_dma_polarities[CONFIG_USB_PD_PORT_COUNT]; void pd_init_dequeue(int port) { @@ -302,7 +302,7 @@ static void tx_dma_done(void *data) pd_phy[port].tim_tx->cr1 &= ~1; #if defined(CONFIG_COMMON_RUNTIME) && defined(CONFIG_DMA_DEFAULT_HANDLERS) - task_set_event(PORT_TO_TASK_ID(port), TASK_EVENT_DMA_TC, 0); + task_set_event(PD_PORT_TO_TASK_ID(port), TASK_EVENT_DMA_TC, 0); #endif } @@ -456,7 +456,7 @@ void pd_rx_handler(void) int next_idx; pending = STM32_EXTI_PR; - for (i = 0; i < PD_PORT_COUNT; i++) { + for (i = 0; i < CONFIG_USB_PD_PORT_COUNT; i++) { if (pending & EXTI_COMP_MASK(i)) { rx_edge_ts[i][rx_edge_ts_idx[i]].val = get_time().val; next_idx = (rx_edge_ts_idx[i] == |