diff options
author | Vincent Palatin <vpalatin@chromium.org> | 2014-10-30 14:53:23 -0700 |
---|---|---|
committer | chrome-internal-fetch <chrome-internal-fetch@google.com> | 2014-11-18 18:18:34 +0000 |
commit | c8d7462fcffc1f25d6230734ee6f19a154ebf63a (patch) | |
tree | ca422e0820054db2d633f385e601dd86eb664034 /chip/stm32/usb_pd_phy.c | |
parent | bacd096372e22d87d7b98d9afc9ae9db91d4e0b9 (diff) | |
download | chrome-ec-c8d7462fcffc1f25d6230734ee6f19a154ebf63a.tar.gz |
Twinkie: add packet injection capability
Add commands to send PD packets and to tweak individual parameters (TX
clock frequency, RX detection threshold, resistors on CCx).
Signed-off-by: Vincent Palatin <vpalatin@chromium.org>
BRANCH=none
BUG=chrome-os-partner:28337
TEST=verify that the PD sniffing is still working by dumping traffic
between Zinger and Samus.
Connect Twinkie to Zinger, set Rd by using "tw res NONE RD" and see VBUS
going to 5V (reading it using "ina 0").
Send a BIST mode 2 request using the following command :
tw send 2 0x1043 50000000
and see the other end starting sending BIST.
Change-Id: I3c8ddf858435ac1c17a43f59351bbaa69603a209
Reviewed-on: https://chromium-review.googlesource.com/227778
Reviewed-by: Todd Broch <tbroch@chromium.org>
Commit-Queue: Vincent Palatin <vpalatin@chromium.org>
Tested-by: Vincent Palatin <vpalatin@chromium.org>
Diffstat (limited to 'chip/stm32/usb_pd_phy.c')
-rw-r--r-- | chip/stm32/usb_pd_phy.c | 13 |
1 files changed, 7 insertions, 6 deletions
diff --git a/chip/stm32/usb_pd_phy.c b/chip/stm32/usb_pd_phy.c index 784e294fd7..7079709e99 100644 --- a/chip/stm32/usb_pd_phy.c +++ b/chip/stm32/usb_pd_phy.c @@ -493,12 +493,6 @@ void pd_hw_init(int port) dma_prepare_tx(&(phy->dma_tx_option), PD_MAX_RAW_SIZE, phy->raw_samples); - /* configure RX DMA */ - phy->dma_tim_option.channel = DMAC_TIM_RX(port); - phy->dma_tim_option.periph = (void *)(TIM_RX_CCR_REG(port)); - phy->dma_tim_option.flags = STM32_DMA_CCR_MSIZE_8_BIT | - STM32_DMA_CCR_PSIZE_16_BIT; - /* configure registers used for timers */ phy->tim_tx = (void *)TIM_REG_TX(port); phy->tim_rx = (void *)TIM_REG_RX(port); @@ -529,6 +523,12 @@ void pd_hw_init(int port) /* Reload the pre-scaler and reset the counter */ phy->tim_tx->egr = 0x0001; #endif +#ifndef CONFIG_USB_PD_TX_PHY_ONLY + /* configure RX DMA */ + phy->dma_tim_option.channel = DMAC_TIM_RX(port); + phy->dma_tim_option.periph = (void *)(TIM_RX_CCR_REG(port)); + phy->dma_tim_option.flags = STM32_DMA_CCR_MSIZE_8_BIT | + STM32_DMA_CCR_PSIZE_16_BIT; /* --- set counter for RX timing : 2.4Mhz rate, free-running --- */ __hw_timer_enable_clock(TIM_CLOCK_PD_RX(port), 1); @@ -600,6 +600,7 @@ void pd_hw_init(int port) EXTI_XTSR |= EXTI_COMP_MASK(port); STM32_EXTI_IMR |= EXTI_COMP_MASK(port); task_enable_irq(IRQ_COMP); +#endif /* CONFIG_USB_PD_TX_PHY_ONLY */ CPRINTS("USB PD initialized"); } |