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authorSam Hurst <shurst@google.com>2020-08-03 13:06:42 -0700
committerCommit Bot <commit-bot@chromium.org>2020-08-05 18:41:25 +0000
commitdede4e01ae4c877bb05d671087a6e85a29a0f902 (patch)
tree8aaaba7b7ce04c059ecd4df4de8a5609492065db /chip/stm32
parente891cd5ebbb08c9101f1802c2dfcec755718d23f (diff)
downloadchrome-ec-dede4e01ae4c877bb05d671087a6e85a29a0f902.tar.gz
ec: change usage of dummy
Google is working to change its source code to use more inclusive language. To that end, replace the term "dummy" with inclusive alternatives. BUG=b:162781382 BRANCH=None TEST=make -j buildall `grep -ir dummy *` The only results are in "private/nordic_keyboard/sdk8.0.0" which is not our code. Signed-off-by: Sam Hurst <shurst@google.com> Change-Id: I6a42183d998e4db4bb61625f962867fda10722e2 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2335737 Reviewed-by: Tom Hughes <tomhughes@chromium.org>
Diffstat (limited to 'chip/stm32')
-rw-r--r--chip/stm32/adc-stm32f3.c2
-rw-r--r--chip/stm32/clock-stm32f0.c6
-rw-r--r--chip/stm32/clock-stm32f4.c6
-rw-r--r--chip/stm32/clock-stm32g4.c6
-rw-r--r--chip/stm32/clock-stm32h7.c6
-rw-r--r--chip/stm32/clock-stm32l.c6
-rw-r--r--chip/stm32/clock-stm32l4.c6
-rw-r--r--chip/stm32/i2c-stm32f4.c8
-rw-r--r--chip/stm32/registers.h2
-rw-r--r--chip/stm32/spi.c14
-rw-r--r--chip/stm32/spi_master.c4
-rw-r--r--chip/stm32/trng.c2
12 files changed, 34 insertions, 34 deletions
diff --git a/chip/stm32/adc-stm32f3.c b/chip/stm32/adc-stm32f3.c
index 180dc05c3b..fb3e4604a8 100644
--- a/chip/stm32/adc-stm32f3.c
+++ b/chip/stm32/adc-stm32f3.c
@@ -231,7 +231,7 @@ static void adc_init(void)
/*
* ADC clock is divided with respect to AHB, so no delay needed
- * here. If ADC clock is the same as AHB, a dummy read on ADC
+ * here. If ADC clock is the same as AHB, a read on ADC
* register is needed here.
*/
diff --git a/chip/stm32/clock-stm32f0.c b/chip/stm32/clock-stm32f0.c
index bea8a7b829..8cfbaef111 100644
--- a/chip/stm32/clock-stm32f0.c
+++ b/chip/stm32/clock-stm32f0.c
@@ -388,14 +388,14 @@ int clock_get_freq(void)
void clock_wait_bus_cycles(enum bus_type bus, uint32_t cycles)
{
- volatile uint32_t dummy __attribute__((unused));
+ volatile uint32_t unused __attribute__((unused));
if (bus == BUS_AHB) {
while (cycles--)
- dummy = STM32_DMA1_REGS->isr;
+ unused = STM32_DMA1_REGS->isr;
} else { /* APB */
while (cycles--)
- dummy = STM32_USART_BRR(STM32_USART1_BASE);
+ unused = STM32_USART_BRR(STM32_USART1_BASE);
}
}
diff --git a/chip/stm32/clock-stm32f4.c b/chip/stm32/clock-stm32f4.c
index 709ac42981..7b83b8507e 100644
--- a/chip/stm32/clock-stm32f4.c
+++ b/chip/stm32/clock-stm32f4.c
@@ -174,14 +174,14 @@ int clock_get_freq(void)
void clock_wait_bus_cycles(enum bus_type bus, uint32_t cycles)
{
- volatile uint32_t dummy __attribute__((unused));
+ volatile uint32_t unused __attribute__((unused));
if (bus == BUS_AHB) {
while (cycles--)
- dummy = STM32_DMA_GET_ISR(0);
+ unused = STM32_DMA_GET_ISR(0);
} else { /* APB */
while (cycles--)
- dummy = STM32_USART_BRR(STM32_USART1_BASE);
+ unused = STM32_USART_BRR(STM32_USART1_BASE);
}
}
diff --git a/chip/stm32/clock-stm32g4.c b/chip/stm32/clock-stm32g4.c
index 488adacf59..4a91e1ad42 100644
--- a/chip/stm32/clock-stm32g4.c
+++ b/chip/stm32/clock-stm32g4.c
@@ -229,14 +229,14 @@ int clock_get_freq(void)
void clock_wait_bus_cycles(enum bus_type bus, uint32_t cycles)
{
- volatile uint32_t dummy __attribute__((unused));
+ volatile uint32_t unused __attribute__((unused));
if (bus == BUS_AHB) {
while (cycles--)
- dummy = STM32_DMA1_REGS->isr;
+ unused = STM32_DMA1_REGS->isr;
} else { /* APB */
while (cycles--)
- dummy = STM32_USART_BRR(STM32_USART1_BASE);
+ unused = STM32_USART_BRR(STM32_USART1_BASE);
}
}
diff --git a/chip/stm32/clock-stm32h7.c b/chip/stm32/clock-stm32h7.c
index bfc56f81df..ba233dbd76 100644
--- a/chip/stm32/clock-stm32h7.c
+++ b/chip/stm32/clock-stm32h7.c
@@ -104,14 +104,14 @@ int clock_get_timer_freq(void)
void clock_wait_bus_cycles(enum bus_type bus, uint32_t cycles)
{
- volatile uint32_t dummy __attribute__((unused));
+ volatile uint32_t unused __attribute__((unused));
if (bus == BUS_AHB) {
while (cycles--)
- dummy = STM32_GPIO_IDR(GPIO_A);
+ unused = STM32_GPIO_IDR(GPIO_A);
} else { /* APB */
while (cycles--)
- dummy = STM32_USART_BRR(STM32_USART1_BASE);
+ unused = STM32_USART_BRR(STM32_USART1_BASE);
}
}
diff --git a/chip/stm32/clock-stm32l.c b/chip/stm32/clock-stm32l.c
index 96acfc85ad..a4e9dd7cdf 100644
--- a/chip/stm32/clock-stm32l.c
+++ b/chip/stm32/clock-stm32l.c
@@ -57,14 +57,14 @@ int clock_get_timer_freq(void)
void clock_wait_bus_cycles(enum bus_type bus, uint32_t cycles)
{
- volatile uint32_t dummy __attribute__((unused));
+ volatile uint32_t unused __attribute__((unused));
if (bus == BUS_AHB) {
while (cycles--)
- dummy = STM32_DMA1_REGS->isr;
+ unused = STM32_DMA1_REGS->isr;
} else { /* APB */
while (cycles--)
- dummy = STM32_USART_BRR(STM32_USART1_BASE);
+ unused = STM32_USART_BRR(STM32_USART1_BASE);
}
}
diff --git a/chip/stm32/clock-stm32l4.c b/chip/stm32/clock-stm32l4.c
index b180177d0b..1bba787779 100644
--- a/chip/stm32/clock-stm32l4.c
+++ b/chip/stm32/clock-stm32l4.c
@@ -44,14 +44,14 @@ int clock_get_timer_freq(void)
void clock_wait_bus_cycles(enum bus_type bus, uint32_t cycles)
{
- volatile uint32_t dummy __attribute__((unused));
+ volatile uint32_t unused __attribute__((unused));
if (bus == BUS_AHB) {
while (cycles--)
- dummy = STM32_DMA1_REGS->isr;
+ unused = STM32_DMA1_REGS->isr;
} else { /* APB */
while (cycles--)
- dummy = STM32_USART_BRR(STM32_USART1_BASE);
+ unused = STM32_USART_BRR(STM32_USART1_BASE);
}
}
diff --git a/chip/stm32/i2c-stm32f4.c b/chip/stm32/i2c-stm32f4.c
index 8c08395edd..515aed20eb 100644
--- a/chip/stm32/i2c-stm32f4.c
+++ b/chip/stm32/i2c-stm32f4.c
@@ -860,7 +860,7 @@ static void i2c_event_handler(int port)
static int rx_pending, buf_idx;
static uint16_t addr_8bit;
- volatile uint32_t dummy __attribute__((unused));
+ volatile uint32_t unused __attribute__((unused));
i2c_cr1 = STM32_I2C_CR1(port);
i2c_sr2 = STM32_I2C_SR2(port);
@@ -903,8 +903,8 @@ static void i2c_event_handler(int port)
/* Enable buffer interrupt to start receive/response */
STM32_I2C_CR2(port) |= STM32_I2C_CR2_ITBUFEN;
/* Clear ADDR bit */
- dummy = STM32_I2C_SR1(port);
- dummy = STM32_I2C_SR2(port);
+ unused = STM32_I2C_SR1(port);
+ unused = STM32_I2C_SR2(port);
/* Inhibit stop mode when addressed until STOPF flag is set */
disable_sleep(SLEEP_MASK_I2C_SLAVE);
}
@@ -964,7 +964,7 @@ static void i2c_event_handler(int port)
/* Clear AF */
STM32_I2C_SR1(port) &= ~STM32_I2C_SR1_AF;
/* Clear STOPF: read SR1 and write CR1 */
- dummy = STM32_I2C_SR1(port);
+ unused = STM32_I2C_SR1(port);
STM32_I2C_CR1(port) = i2c_cr1 | STM32_I2C_CR1_PE;
/* No longer inhibit deep sleep after stop condition */
diff --git a/chip/stm32/registers.h b/chip/stm32/registers.h
index ea6b2db84a..574921c63e 100644
--- a/chip/stm32/registers.h
+++ b/chip/stm32/registers.h
@@ -183,7 +183,7 @@ typedef volatile struct timer_ctlr timer_ctlr_t;
#define GPIO_J STM32_GPIOJ_BASE
#define GPIO_K STM32_GPIOK_BASE
-#define DUMMY_GPIO_BANK GPIO_A
+#define UNIMPLEMENTED_GPIO_BANK GPIO_A
/* --- I2C --- */
diff --git a/chip/stm32/spi.c b/chip/stm32/spi.c
index 21857837c2..3dbbbc4fa9 100644
--- a/chip/stm32/spi.c
+++ b/chip/stm32/spi.c
@@ -308,7 +308,7 @@ static void tx_status(uint8_t byte)
static void setup_for_transaction(void)
{
stm32_spi_regs_t *spi __attribute__((unused)) = STM32_SPI1_REGS;
- volatile uint8_t dummy __attribute__((unused));
+ volatile uint8_t unused __attribute__((unused));
/* clear this as soon as possible */
setup_transaction_later = 0;
@@ -325,15 +325,15 @@ static void setup_for_transaction(void)
dma_disable(STM32_DMAC_SPI1_TX);
/*
- * Read dummy bytes in case there are some pending; this prevents the
+ * Read unused bytes in case there are some pending; this prevents the
* receive DMA from getting that byte right when we start it.
*/
- dummy = SPI_RXDR;
+ unused = SPI_RXDR;
#if defined(CHIP_FAMILY_STM32F0) || defined(CHIP_FAMILY_STM32L4)
/* 4 Bytes makes sure the RX FIFO on the F0 is empty as well. */
- dummy = spi->dr;
- dummy = spi->dr;
- dummy = spi->dr;
+ unused = spi->dr;
+ unused = spi->dr;
+ unused = spi->dr;
#endif
/* Start DMA */
@@ -523,7 +523,7 @@ void spi_event(enum gpio_signal signal)
/*
* Check how big the packet should be. We can't just wait to
* see how much data the host sends, because it will keep
- * sending dummy data until we respond.
+ * sending extra data until we respond.
*/
pkt_size = host_request_expected_size(r);
if (pkt_size == 0 || pkt_size > sizeof(in_msg))
diff --git a/chip/stm32/spi_master.c b/chip/stm32/spi_master.c
index 4b48f8ea80..c2d36bb4d9 100644
--- a/chip/stm32/spi_master.c
+++ b/chip/stm32/spi_master.c
@@ -117,11 +117,11 @@ static int spi_rx_done(stm32_spi_regs_t *spi)
/* Read until RX FIFO is empty (i.e. RX done) */
static int spi_clear_rx_fifo(stm32_spi_regs_t *spi)
{
- uint8_t dummy __attribute__((unused));
+ uint8_t unused __attribute__((unused));
uint32_t start = __hw_clock_source_read(), delta;
while (!spi_rx_done(spi)) {
- dummy = spi->dr; /* Read one byte from FIFO */
+ unused = spi->dr; /* Read one byte from FIFO */
delta = __hw_clock_source_read() - start;
if (delta >= SPI_TRANSACTION_TIMEOUT_USEC)
return EC_ERROR_TIMEOUT;
diff --git a/chip/stm32/trng.c b/chip/stm32/trng.c
index eff3ca0181..48d5335c53 100644
--- a/chip/stm32/trng.c
+++ b/chip/stm32/trng.c
@@ -21,7 +21,7 @@ uint32_t rand(void)
/* Wait for a valid random number */
while (!(STM32_RNG_SR & STM32_RNG_SR_DRDY) && --tries)
;
- /* we cannot afford to feed the caller with a dummy number */
+ /* we cannot afford to feed the caller with an arbitrary number */
if (!tries)
software_panic(PANIC_SW_BAD_RNG, task_get_current());
/* Finally the 32-bit of entropy */