diff options
| author | Vincent Palatin <vpalatin@chromium.org> | 2012-05-01 09:23:48 -0700 |
|---|---|---|
| committer | Vincent Palatin <vpalatin@chromium.org> | 2012-05-01 17:13:33 -0700 |
| commit | a9ceb116c7c047bfb076e1c69bcc0587cd79ac2a (patch) | |
| tree | 31b662dd2e4f28412f2da6d71c243fa76331b0b5 /chip/stm32 | |
| parent | 709eee03f583a5af918bfbe5898f7f0b1f013ecb (diff) | |
| download | chrome-ec-a9ceb116c7c047bfb076e1c69bcc0587cd79ac2a.tar.gz | |
introducing chip variant for stm32 family [2/3]
Add a parameter to define the chip variant and pass it to build/make
processes.
Signed-off-by: Vincent Palatin <vpalatin@chromium.org>
BUG=chrome-os-partner:9057
TEST=make BOARD=daisy ; make BOARD=adv ; make BOARD=discovery
Change-Id: I87b65b582ed5fc2cf5966446e15224ac15e328e9
Diffstat (limited to 'chip/stm32')
| -rw-r--r-- | chip/stm32/config-stm32l15x.h | 30 | ||||
| -rw-r--r-- | chip/stm32/config.h | 30 |
2 files changed, 38 insertions, 22 deletions
diff --git a/chip/stm32/config-stm32l15x.h b/chip/stm32/config-stm32l15x.h new file mode 100644 index 0000000000..eafe078f1e --- /dev/null +++ b/chip/stm32/config-stm32l15x.h @@ -0,0 +1,30 @@ +/* Copyright (c) 2012 The Chromium OS Authors. All rights reserved. + * Use of this source code is governed by a BSD-style license that can be + * found in the LICENSE file. + */ + +/* Memory mapping */ +#define CONFIG_FLASH_BASE 0x08000000 +#define CONFIG_FLASH_SIZE 0x00020000 +#define CONFIG_FLASH_BANK_SIZE 0x1000 +#define CONFIG_RAM_BASE 0x20000000 +#define CONFIG_RAM_SIZE 0x00004000 + +/* Size of one firmware image in flash */ +#define CONFIG_FW_IMAGE_SIZE (32 * 1024) +#define CONFIG_FW_RO_OFF 0 +#define CONFIG_FW_A_OFF CONFIG_FW_IMAGE_SIZE +#define CONFIG_FW_B_OFF (2 * CONFIG_FW_IMAGE_SIZE) + +/* Number of IRQ vectors on the NVIC */ +#define CONFIG_IRQ_COUNT 45 + +/* Debug UART parameters for panic message */ +#ifdef BOARD_adv +#define CONFIG_UART_ADDRESS 0x40004400 /* USART2 */ +#else +#define CONFIG_UART_ADDRESS 0x40013800 /* USART1 */ +#endif +#define CONFIG_UART_DR_OFFSET 0x04 +#define CONFIG_UART_SR_OFFSET 0x00 +#define CONFIG_UART_SR_TXEMPTY 0x80 diff --git a/chip/stm32/config.h b/chip/stm32/config.h index ef4dd75b27..567c03ee0a 100644 --- a/chip/stm32/config.h +++ b/chip/stm32/config.h @@ -3,31 +3,15 @@ * found in the LICENSE file. */ -/* Memory mapping */ -#define CONFIG_FLASH_BASE 0x08000000 -#define CONFIG_FLASH_SIZE 0x00020000 -#define CONFIG_FLASH_BANK_SIZE 0x1000 -#define CONFIG_RAM_BASE 0x20000000 -#define CONFIG_RAM_SIZE 0x00004000 +#ifndef __CROS_EC_CHIP_CONFIG_H +#define __CROS_EC_CHIP_CONFIG_H -/* Size of one firmware image in flash */ -#define CONFIG_FW_IMAGE_SIZE (32 * 1024) -#define CONFIG_FW_RO_OFF 0 -#define CONFIG_FW_A_OFF CONFIG_FW_IMAGE_SIZE -#define CONFIG_FW_B_OFF (2 * CONFIG_FW_IMAGE_SIZE) - -/* Number of IRQ vectors on the NVIC */ -#define CONFIG_IRQ_COUNT 45 - -/* Debug UART parameters for panic message */ -#ifdef BOARD_adv -#define CONFIG_UART_ADDRESS 0x40004400 /* USART2 */ +/* use variant specific configuration for flash / UART / IRQ */ +#ifdef CHIP_VARIANT_stm32l15x +#include "config-stm32l15x.h" #else -#define CONFIG_UART_ADDRESS 0x40013800 /* USART1 */ +#error "Unsupported chip variant" #endif -#define CONFIG_UART_DR_OFFSET 0x04 -#define CONFIG_UART_SR_OFFSET 0x00 -#define CONFIG_UART_SR_TXEMPTY 0x80 /* System stack size */ #define CONFIG_STACK_SIZE 1024 @@ -37,3 +21,5 @@ /* Compile for running from RAM instead of flash */ /* #define COMPILE_FOR_RAM */ + +#endif /* __CROS_EC_CHIP_CONFIG_H */ |