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authorNicolas Boichat <drinkcat@google.com>2017-03-01 15:10:39 +0800
committerchrome-bot <chrome-bot@chromium.org>2017-05-02 22:50:32 -0700
commit7fb0338cbd40d40db2a304cd3e8ed10ae4f59450 (patch)
treeec27fb44d6c27d537f35e02cd150890b51f851e1 /chip/stm32
parent49c776b5b78462ae2118fca240f7fb5df7dc444c (diff)
downloadchrome-ec-7fb0338cbd40d40db2a304cd3e8ed10ae4f59450.tar.gz
hammer: Pulse detection pin on USB wake event
When usb_wake is called (key press, trackpad event), pulse detection pin for 100us. This allows Lid EC to wake the AP even when it is in deep S3 mode, where normal wake using USB lines does not work. BRANCH=none BUG=b:35775062 TEST=Flash hammer, looks at poppy console: base power is not disconnected, but events appear in the console. Change-Id: I7b8ee407046d4caa1ce75190c30d693b71b00d2e Reviewed-on: https://chromium-review.googlesource.com/448380 Commit-Ready: Nicolas Boichat <drinkcat@chromium.org> Tested-by: Nicolas Boichat <drinkcat@chromium.org> Reviewed-by: Vincent Palatin <vpalatin@chromium.org>
Diffstat (limited to 'chip/stm32')
-rw-r--r--chip/stm32/usb.c9
1 files changed, 9 insertions, 0 deletions
diff --git a/chip/stm32/usb.c b/chip/stm32/usb.c
index b20f7d271f..018a26ce03 100644
--- a/chip/stm32/usb.c
+++ b/chip/stm32/usb.c
@@ -372,6 +372,12 @@ static volatile int usb_wake_done = 1;
*/
static volatile int esof_count;
+__attribute__((weak))
+void board_usb_wake(void)
+{
+ /* Side-band USB wake, do nothing by default. */
+}
+
void usb_wake(void)
{
if (!remote_wakeup_enabled ||
@@ -396,6 +402,9 @@ void usb_wake(void)
*/
esof_count = 3;
STM32_USB_CNTR |= STM32_USB_CNTR_RESUME | STM32_USB_CNTR_ESOFM;
+
+ /* Try side-band wake as well. */
+ board_usb_wake();
}
#endif