diff options
author | Rong Chang <rongchang@google.com> | 2017-02-06 18:39:08 +0800 |
---|---|---|
committer | chrome-bot <chrome-bot@chromium.org> | 2017-04-26 11:25:57 -0700 |
commit | 86397ec144dcad7f23635b0f1397ae4a015162bb (patch) | |
tree | da050354c4acb66ada6ecf210dcd99e6ff6ab0ea /chip/stm32 | |
parent | a04a310913100b6c04eb25746b49f5cd56aa9e31 (diff) | |
download | chrome-ec-86397ec144dcad7f23635b0f1397ae4a015162bb.tar.gz |
rose: enable stm32f4 EXTI IRQs
This change copied gpio_init() from stm32f373 driver.
BUG=chromium:688979
TEST=load on dev board and check button interrupt
BRANCH=none
Change-Id: I9dc12ffc02899211b6d07a640682899654c2bbed
Signed-off-by: Rong Chang <rongchang@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/438909
Commit-Ready: Wei-Ning Huang <wnhuang@chromium.org>
Tested-by: Wei-Ning Huang <wnhuang@chromium.org>
Reviewed-by: Vincent Palatin <vpalatin@chromium.org>
Diffstat (limited to 'chip/stm32')
-rw-r--r-- | chip/stm32/gpio-stm32f4.c | 25 |
1 files changed, 25 insertions, 0 deletions
diff --git a/chip/stm32/gpio-stm32f4.c b/chip/stm32/gpio-stm32f4.c index e456a1920a..3d4e5ddde1 100644 --- a/chip/stm32/gpio-stm32f4.c +++ b/chip/stm32/gpio-stm32f4.c @@ -7,7 +7,11 @@ #include "clock.h" #include "common.h" +#include "gpio.h" +#include "hooks.h" #include "registers.h" +#include "task.h" +#include "util.h" void gpio_enable_clocks(void) { @@ -23,4 +27,25 @@ void gpio_enable_clocks(void) clock_wait_bus_cycles(BUS_AHB, 1); } +static void gpio_init(void) +{ + /* Enable IRQs now that pins are set up */ + task_enable_irq(STM32_IRQ_EXTI0); + task_enable_irq(STM32_IRQ_EXTI1); + task_enable_irq(STM32_IRQ_EXTI2); + task_enable_irq(STM32_IRQ_EXTI3); + task_enable_irq(STM32_IRQ_EXTI4); + task_enable_irq(STM32_IRQ_EXTI9_5); + task_enable_irq(STM32_IRQ_EXTI15_10); +} +DECLARE_HOOK(HOOK_INIT, gpio_init, HOOK_PRIO_DEFAULT); + +DECLARE_IRQ(STM32_IRQ_EXTI0, gpio_interrupt, 1); +DECLARE_IRQ(STM32_IRQ_EXTI1, gpio_interrupt, 1); +DECLARE_IRQ(STM32_IRQ_EXTI2, gpio_interrupt, 1); +DECLARE_IRQ(STM32_IRQ_EXTI3, gpio_interrupt, 1); +DECLARE_IRQ(STM32_IRQ_EXTI4, gpio_interrupt, 1); +DECLARE_IRQ(STM32_IRQ_EXTI9_5, gpio_interrupt, 1); +DECLARE_IRQ(STM32_IRQ_EXTI15_10, gpio_interrupt, 1); + #include "gpio-f0-l.c" |