stm32: add synchronous debug printf

Allow use of a synchronous debug printf instead of using the
full console task to save space. This can be turned on with
CONFIG_DEBUG_PRINTF, and will provide essentially a one-way
console for debugging. This is essentially expanding upon
the debug_printf work done for zinger.

BUG=chrome-os-partner:41959
BRANCH=none
TEST=tested with following CLs on glados_pd by verifying we
get a one-way console.

Change-Id: If028b5d873261890de5b270bbc00e06bdcaa7431
Signed-off-by: Alec Berg <alecaberg@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/306782
Reviewed-by: Vincent Palatin <vpalatin@chromium.org>

3 files changed, 132 insertions, 0 deletions

diff --git a/chip/stm32/build.mk b/chip/stm32/build.mk
index 1c1df1a789..53b48b6ab5 100644
--- a/chip/stm32/build.mk
+++ b/chip/stm32/build.mk
@@ -50,6 +50,7 @@ chip-$(CHIP_FAMILY_STM32F0)+=flash-f.o
 chip-$(CHIP_FAMILY_STM32F3)+=flash-f.o
 endif
 chip-$(CONFIG_ADC)+=adc-$(CHIP_FAMILY).o
+chip-$(CONFIG_DEBUG_PRINTF)+=debug_printf.o
 chip-$(CONFIG_PWM)+=pwm.o
 chip-$(CONFIG_USB)+=usb.o usb-$(CHIP_FAMILY).o usb_endpoints.o
 chip-$(CONFIG_USB_CONSOLE)+=usb_console.o
diff --git a/chip/stm32/debug_printf.c b/chip/stm32/debug_printf.c
new file mode 100644
index 0000000000..c4e151692c
--- /dev/null
+++ b/chip/stm32/debug_printf.c
@@ -0,0 +1,115 @@
+/* Copyright 2015 The Chromium OS Authors. All rights reserved.
+ * Use of this source code is governed by a BSD-style license that can be
+ * found in the LICENSE file.
+ */
+/* Synchronous UART debug printf */
+
+#include "common.h"
+#include "console.h"
+#include "gpio.h"
+#include "printf.h"
+#include "registers.h"
+#include "util.h"
+
+static int debug_txchar(void *context, int c)
+{
+	if (c == '\n') {
+		while (!(STM32_USART_SR(UARTN_BASE) & STM32_USART_SR_TXE))
+			;
+		STM32_USART_TDR(UARTN_BASE) = '\r';
+	}
+
+	/* Wait for space to transmit */
+	while (!(STM32_USART_SR(UARTN_BASE) & STM32_USART_SR_TXE))
+		;
+	STM32_USART_TDR(UARTN_BASE) = c;
+
+	return 0;
+}
+
+
+
+void debug_printf(const char *format, ...)
+{
+	va_list args;
+
+	va_start(args, format);
+	vfnprintf(debug_txchar, NULL, format, args);
+	va_end(args);
+}
+
+#ifdef CONFIG_COMMON_RUNTIME
+void cflush(void)
+{
+	/* Wait for transmit complete */
+	while (!(STM32_USART_SR(UARTN_BASE) & STM32_USART_SR_TC))
+		;
+}
+
+int cputs(enum console_channel channel, const char *outstr)
+{
+	debug_printf(outstr);
+
+	return 0;
+}
+
+void panic_puts(const char *outstr)
+{
+	debug_printf(outstr);
+	cflush();
+}
+
+int cprintf(enum console_channel channel, const char *format, ...)
+{
+	va_list args;
+
+	va_start(args, format);
+	vfnprintf(debug_txchar, NULL, format, args);
+	va_end(args);
+
+	return 0;
+}
+
+void panic_printf(const char *format, ...)
+{
+	va_list args;
+
+	va_start(args, format);
+	vfnprintf(debug_txchar, NULL, format, args);
+	va_end(args);
+
+	cflush();
+}
+
+int cprints(enum console_channel channel, const char *format, ...)
+{
+	va_list args;
+
+	va_start(args, format);
+	vfnprintf(debug_txchar, NULL, format, args);
+	va_end(args);
+
+	debug_printf("\n");
+
+	return 0;
+}
+
+void uart_init(void)
+{
+	/* Enable USART1 clock */
+	STM32_RCC_APB2ENR |= STM32_RCC_PB2_USART1;
+	/* set baudrate */
+	STM32_USART_BRR(UARTN_BASE) =
+		DIV_ROUND_NEAREST(CPU_CLOCK, CONFIG_UART_BAUD_RATE);
+	/* UART enabled, 8 Data bits, oversampling x16, no parity */
+	STM32_USART_CR1(UARTN_BASE) =
+		STM32_USART_CR1_UE | STM32_USART_CR1_TE | STM32_USART_CR1_RE;
+	/* 1 stop bit, no fancy stuff */
+	STM32_USART_CR2(UARTN_BASE) = 0x0000;
+	/* DMA disabled, special modes disabled, error interrupt disabled */
+	STM32_USART_CR3(UARTN_BASE) = 0x0000;
+
+	/* Configure GPIOs */
+	gpio_config_module(MODULE_UART, 1);
+}
+#endif
diff --git a/chip/stm32/debug_printf.h b/chip/stm32/debug_printf.h
new file mode 100644
index 0000000000..38cea6fb28
--- /dev/null
+++ b/chip/stm32/debug_printf.h
@@ -0,0 +1,16 @@
+/* Copyright (c) 2014 The Chromium OS Authors. All rights reserved.
+ * Use of this source code is governed by a BSD-style license that can be
+ * found in the LICENSE file.
+ */
+/* Synchronous UART debug printf */
+
+#ifndef __CROS_EC_DEBUG_H
+#define __CROS_EC_DEBUG_H
+
+#ifdef CONFIG_DEBUG_PRINTF
+void debug_printf(const char *format, ...);
+#else
+#define debug_printf(...)
+#endif
+
+#endif /* __CROS_EC_DEBUG_H */