diff options
| author | Harry Cutts <hcutts@chromium.org> | 2021-06-22 17:37:52 -0700 |
|---|---|---|
| committer | Commit Bot <commit-bot@chromium.org> | 2021-06-25 17:45:55 +0000 |
| commit | ec339489d1f0d67f43934949a9b7fb271a043546 (patch) | |
| tree | e06341f2011a2aa41a68f4f1acfdaa6cf48d101e /chip/stm32 | |
| parent | 59315ca614ae9883e5bfacb91d45b0d5529b0aa5 (diff) | |
| download | chrome-ec-ec339489d1f0d67f43934949a9b7fb271a043546.tar.gz | |
stm32: rename CONFIG_STM32_SPI1_MASTER to …CONTROLLER
In line with OSHWA terminology.
BUG=b:181607131
TEST=make -j BOARD=hammer
BRANCH=none
Change-Id: I6d212e60d5aceb8497f00520b693006cc1af2d45
Signed-off-by: Harry Cutts <hcutts@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2981123
Reviewed-by: caveh jalali <caveh@chromium.org>
Diffstat (limited to 'chip/stm32')
| -rw-r--r-- | chip/stm32/spi_master-stm32h7.c | 10 | ||||
| -rw-r--r-- | chip/stm32/spi_master.c | 8 |
2 files changed, 9 insertions, 9 deletions
diff --git a/chip/stm32/spi_master-stm32h7.c b/chip/stm32/spi_master-stm32h7.c index a031ff76c6..4195dc595a 100644 --- a/chip/stm32/spi_master-stm32h7.c +++ b/chip/stm32/spi_master-stm32h7.c @@ -18,7 +18,7 @@ /* SPI ports are used as master */ static stm32_spi_regs_t *SPI_REGS[] = { -#ifdef CONFIG_STM32_SPI1_MASTER +#ifdef CONFIG_STM32_SPI1_CONTROLLER STM32_SPI1_REGS, #endif STM32_SPI2_REGS, @@ -28,7 +28,7 @@ static stm32_spi_regs_t *SPI_REGS[] = { /* DMA request mapping on channels */ static uint8_t dma_req_tx[ARRAY_SIZE(SPI_REGS)] = { -#ifdef CONFIG_STM32_SPI1_MASTER +#ifdef CONFIG_STM32_SPI1_CONTROLLER DMAMUX1_REQ_SPI1_TX, #endif DMAMUX1_REQ_SPI2_TX, @@ -36,7 +36,7 @@ static uint8_t dma_req_tx[ARRAY_SIZE(SPI_REGS)] = { DMAMUX1_REQ_SPI4_TX, }; static uint8_t dma_req_rx[ARRAY_SIZE(SPI_REGS)] = { -#ifdef CONFIG_STM32_SPI1_MASTER +#ifdef CONFIG_STM32_SPI1_CONTROLLER DMAMUX1_REQ_SPI1_RX, #endif DMAMUX1_REQ_SPI2_RX, @@ -49,7 +49,7 @@ static struct mutex spi_mutex[ARRAY_SIZE(SPI_REGS)]; #define SPI_TRANSACTION_TIMEOUT_USEC (800 * MSEC) static const struct dma_option dma_tx_option[] = { -#ifdef CONFIG_STM32_SPI1_MASTER +#ifdef CONFIG_STM32_SPI1_CONTROLLER { STM32_DMAC_SPI1_TX, (void *)&STM32_SPI1_REGS->txdr, STM32_DMA_CCR_MSIZE_8_BIT | STM32_DMA_CCR_PSIZE_8_BIT @@ -70,7 +70,7 @@ static const struct dma_option dma_tx_option[] = { }; static const struct dma_option dma_rx_option[] = { -#ifdef CONFIG_STM32_SPI1_MASTER +#ifdef CONFIG_STM32_SPI1_CONTROLLER { STM32_DMAC_SPI1_RX, (void *)&STM32_SPI1_REGS->rxdr, STM32_DMA_CCR_MSIZE_8_BIT | STM32_DMA_CCR_PSIZE_8_BIT diff --git a/chip/stm32/spi_master.c b/chip/stm32/spi_master.c index 86185680cf..8943c0c682 100644 --- a/chip/stm32/spi_master.c +++ b/chip/stm32/spi_master.c @@ -27,7 +27,7 @@ /* The second (and third if available) SPI port are used as master */ static stm32_spi_regs_t *SPI_REGS[] = { -#ifdef CONFIG_STM32_SPI1_MASTER +#ifdef CONFIG_STM32_SPI1_CONTROLLER STM32_SPI1_REGS, #endif STM32_SPI2_REGS, @@ -39,7 +39,7 @@ static stm32_spi_regs_t *SPI_REGS[] = { #ifdef CHIP_FAMILY_STM32L4 /* DMA request mapping on channels */ static uint8_t dma_req[ARRAY_SIZE(SPI_REGS)] = { -#ifdef CONFIG_STM32_SPI1_MASTER +#ifdef CONFIG_STM32_SPI1_CONTROLLER /* SPI1 */ 1, #endif /* SPI2 */ 1, @@ -59,7 +59,7 @@ static struct mutex spi_mutex[ARRAY_SIZE(SPI_REGS)]; #endif static const struct dma_option dma_tx_option[] = { -#ifdef CONFIG_STM32_SPI1_MASTER +#ifdef CONFIG_STM32_SPI1_CONTROLLER { STM32_DMAC_SPI1_TX, (void *)&STM32_SPI1_REGS->dr, STM32_DMA_CCR_MSIZE_8_BIT | STM32_DMA_CCR_PSIZE_8_BIT @@ -81,7 +81,7 @@ static const struct dma_option dma_tx_option[] = { }; static const struct dma_option dma_rx_option[] = { -#ifdef CONFIG_STM32_SPI1_MASTER +#ifdef CONFIG_STM32_SPI1_CONTROLLER { STM32_DMAC_SPI1_RX, (void *)&STM32_SPI1_REGS->dr, STM32_DMA_CCR_MSIZE_8_BIT | STM32_DMA_CCR_PSIZE_8_BIT |