include/flash: rename the APIs

The names conflict when enabling both Zephyr's flash driver and
CONFIG_FLASH_CROS option. Rename all the APIs in include/flash.h

BUG=b:187192628
BRANCH=none
TEST=make buildall -j4

Signed-off-by: Tim Lin <tim2.lin@ite.corp-partner.google.com>
Change-Id: If1fd0ea28fa9f5cec1c1daa8f72f63eb7a0e6500
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2931749
Commit-Queue: Keith Short <keithshort@chromium.org>
Reviewed-by: Keith Short <keithshort@chromium.org>
Reviewed-by: Denis Brockus <dbrockus@chromium.org>

8 files changed, 88 insertions, 83 deletions

diff --git a/chip/stm32/flash-f.c b/chip/stm32/flash-f.c
index b192d44255..9e35a2c689 100644
--- a/chip/stm32/flash-f.c
+++ b/chip/stm32/flash-f.c
@@ -341,7 +341,7 @@ bool is_flash_rdp_enabled(void)
 /*****************************************************************************/
 /* Physical layer APIs */
 
-int flash_physical_write(int offset, int size, const char *data)
+int crec_flash_physical_write(int offset, int size, const char *data)
 {
 #if CONFIG_FLASH_WRITE_SIZE == 1
 	uint8_t *address = (uint8_t *)(CONFIG_PROGRAM_MEMORY_BASE + offset);
@@ -420,15 +420,15 @@ exit_wr:
 	return res;
 }
 
-int flash_physical_erase(int offset, int size)
+int crec_flash_physical_erase(int offset, int size)
 {
 	int res = EC_SUCCESS;
 	int sector_size;
 	int timeout_us;
 #ifdef CHIP_FAMILY_STM32F4
-	int sector = flash_bank_index(offset);
+	int sector = crec_flash_bank_index(offset);
 	/* we take advantage of sector_size == erase_size */
-	if ((sector < 0) || (flash_bank_index(offset + size) < 0))
+	if ((sector < 0) || (crec_flash_bank_index(offset + size) < 0))
 		return EC_ERROR_INVAL;  /* Invalid range */
 #endif
 
@@ -444,7 +444,7 @@ int flash_physical_erase(int offset, int size)
 	while (size > 0) {
 		timestamp_t deadline;
 #ifdef CHIP_FAMILY_STM32F4
-		sector_size = flash_bank_size(sector);
+		sector_size = crec_flash_bank_size(sector);
 		/* Timeout: from spec, proportional to the size
 		 * inversely proportional to the write size.
 		 */
@@ -454,7 +454,7 @@ int flash_physical_erase(int offset, int size)
 		timeout_us = FLASH_ERASE_TIMEOUT_US;
 #endif
 		/* Do nothing if already erased */
-		if (flash_is_erased(offset, sector_size))
+		if (crec_flash_is_erased(offset, sector_size))
 			goto next_sector;
 #ifdef CHIP_FAMILY_STM32F4
 		/* select page to erase */
@@ -533,7 +533,7 @@ static int flash_physical_protect_at_boot_update_rdp_pstate(uint32_t new_flags)
 #endif
 }
 
-int flash_physical_protect_at_boot(uint32_t new_flags)
+int crec_flash_physical_protect_at_boot(uint32_t new_flags)
 {
 	int block;
 	int original_val, val;
@@ -580,7 +580,7 @@ static int flash_physical_get_protect_at_boot(int block)
 	return (!(val & (1 << (block % 8)))) ? 1 : 0;
 }
 
-int flash_physical_protect_at_boot(uint32_t new_flags)
+int crec_flash_physical_protect_at_boot(uint32_t new_flags)
 {
 	int block;
 	int i;
@@ -646,7 +646,7 @@ static void unprotect_all_blocks(void)
  */
 static int registers_need_reset(void)
 {
-	uint32_t flags = flash_get_protect();
+	uint32_t flags = crec_flash_get_protect();
 	int i;
 	int ro_at_boot = (flags & EC_FLASH_PROTECT_RO_AT_BOOT) ? 1 : 0;
 	int ro_wp_region_start = WP_BANK_OFFSET;
@@ -723,10 +723,10 @@ enum flash_rdp_level flash_physical_get_rdp_level(void)
 /*****************************************************************************/
 /* High-level APIs */
 
-int flash_pre_init(void)
+int crec_flash_pre_init(void)
 {
 	uint32_t reset_flags = system_get_reset_flags();
-	uint32_t prot_flags = flash_get_protect();
+	uint32_t prot_flags = crec_flash_get_protect();
 	int need_reset = 0;
 
 
@@ -738,7 +738,7 @@ int flash_pre_init(void)
 		 STM32_FLASH_CR_PSIZE_OFFSET;
 	lock();
 #endif
-	if (flash_physical_restore_state())
+	if (crec_flash_physical_restore_state())
 		return EC_SUCCESS;
 
 	/*
@@ -751,7 +751,7 @@ int flash_pre_init(void)
 	if (prot_flags & EC_FLASH_PROTECT_GPIO_ASSERTED) {
 		if (prot_flags & EC_FLASH_PROTECT_RO_NOW) {
 			/* Enable physical protection for RO (0 means RO). */
-			flash_physical_protect_now(0);
+			crec_flash_physical_protect_now(0);
 		}
 
 		if ((prot_flags & EC_FLASH_PROTECT_RO_AT_BOOT) &&
@@ -762,7 +762,7 @@ int flash_pre_init(void)
 			 * update to the write protect register and reboot so
 			 * it takes effect.
 			 */
-			flash_physical_protect_at_boot(
+			crec_flash_physical_protect_at_boot(
 				EC_FLASH_PROTECT_RO_AT_BOOT);
 			need_reset = 1;
 		}
@@ -776,7 +776,7 @@ int flash_pre_init(void)
 			 * to the check above.  One of them should be able to
 			 * go away.
 			 */
-			flash_protect_at_boot(
+			crec_flash_protect_at_boot(
 				prot_flags & EC_FLASH_PROTECT_RO_AT_BOOT);
 			need_reset = 1;
 		}
@@ -791,7 +791,8 @@ int flash_pre_init(void)
 		}
 	}
 
-	if ((flash_physical_get_valid_flags() & EC_FLASH_PROTECT_ALL_AT_BOOT) &&
+	if ((crec_flash_physical_get_valid_flags() &
+	    EC_FLASH_PROTECT_ALL_AT_BOOT) &&
 	    (!!(prot_flags & EC_FLASH_PROTECT_ALL_AT_BOOT) !=
 	     !!(prot_flags & EC_FLASH_PROTECT_ALL_NOW))) {
 		/*
@@ -806,7 +807,8 @@ int flash_pre_init(void)
 	}
 
 #ifdef CONFIG_FLASH_PROTECT_RW
-	if ((flash_physical_get_valid_flags() & EC_FLASH_PROTECT_RW_AT_BOOT) &&
+	if ((crec_flash_physical_get_valid_flags() &
+	    EC_FLASH_PROTECT_RW_AT_BOOT) &&
 	    (!!(prot_flags & EC_FLASH_PROTECT_RW_AT_BOOT) !=
 	     !!(prot_flags & EC_FLASH_PROTECT_RW_NOW))) {
 		/* RW_AT_BOOT and RW_NOW do not match. */
@@ -815,7 +817,8 @@ int flash_pre_init(void)
 #endif
 
 #ifdef CONFIG_ROLLBACK
-	if ((flash_physical_get_valid_flags() & EC_FLASH_PROTECT_ROLLBACK_AT_BOOT) &&
+	if ((crec_flash_physical_get_valid_flags() &
+	    EC_FLASH_PROTECT_ROLLBACK_AT_BOOT) &&
 	    (!!(prot_flags & EC_FLASH_PROTECT_ROLLBACK_AT_BOOT) !=
 	     !!(prot_flags & EC_FLASH_PROTECT_ROLLBACK_NOW))) {
 		/* ROLLBACK_AT_BOOT and ROLLBACK_NOW do not match. */
diff --git a/chip/stm32/flash-stm32f0.c b/chip/stm32/flash-stm32f0.c
index a0aef5fe3f..f790a657c8 100644
--- a/chip/stm32/flash-stm32f0.c
+++ b/chip/stm32/flash-stm32f0.c
@@ -13,7 +13,7 @@
 /*****************************************************************************/
 /* Physical layer APIs */
 
-int flash_physical_get_protect(int block)
+int crec_flash_physical_get_protect(int block)
 {
 	return !(STM32_FLASH_WRPR & BIT(block));
 }
@@ -22,7 +22,7 @@ int flash_physical_get_protect(int block)
  * Note: This does not need to update _NOW flags, as get_protect_flags
  * in common code already does so.
  */
-uint32_t flash_physical_get_protect_flags(void)
+uint32_t crec_flash_physical_get_protect_flags(void)
 {
 	uint32_t flags = 0;
 	uint32_t wrp01 = REG32(STM32_OPTB_BASE + STM32_OPTB_WRP01);
@@ -114,18 +114,18 @@ uint32_t flash_physical_get_protect_flags(void)
 	return flags;
 }
 
-int flash_physical_protect_now(int all)
+int crec_flash_physical_protect_now(int all)
 {
 	return EC_ERROR_INVAL;
 }
 
-int flash_physical_restore_state(void)
+int crec_flash_physical_restore_state(void)
 {
 	/* Nothing to restore */
 	return 0;
 }
 
-uint32_t flash_physical_get_valid_flags(void)
+uint32_t crec_flash_physical_get_valid_flags(void)
 {
 	return EC_FLASH_PROTECT_RO_AT_BOOT |
 	       EC_FLASH_PROTECT_RO_NOW |
@@ -141,7 +141,7 @@ uint32_t flash_physical_get_valid_flags(void)
 	       EC_FLASH_PROTECT_ALL_NOW;
 }
 
-uint32_t flash_physical_get_writable_flags(uint32_t cur_flags)
+uint32_t crec_flash_physical_get_writable_flags(uint32_t cur_flags)
 {
 	uint32_t ret = 0;
 
diff --git a/chip/stm32/flash-stm32f3.c b/chip/stm32/flash-stm32f3.c
index 563190b252..138e690fcc 100644
--- a/chip/stm32/flash-stm32f3.c
+++ b/chip/stm32/flash-stm32f3.c
@@ -94,7 +94,7 @@ struct flash_wp_state {
 /*****************************************************************************/
 /* Physical layer APIs */
 
-int flash_physical_get_protect(int block)
+int crec_flash_physical_get_protect(int block)
 {
 	return (entire_flash_locked ||
 #if defined(CHIP_FAMILY_STM32F3)
@@ -105,7 +105,7 @@ int flash_physical_get_protect(int block)
 	       );
 }
 
-uint32_t flash_physical_get_protect_flags(void)
+uint32_t crec_flash_physical_get_protect_flags(void)
 {
 	uint32_t flags = 0;
 
@@ -121,7 +121,7 @@ uint32_t flash_physical_get_protect_flags(void)
 	return flags;
 }
 
-int flash_physical_protect_now(int all)
+int crec_flash_physical_protect_now(int all)
 {
 	if (all) {
 		disable_flash_control_register();
@@ -135,14 +135,14 @@ int flash_physical_protect_now(int all)
 	return EC_SUCCESS;
 }
 
-uint32_t flash_physical_get_valid_flags(void)
+uint32_t crec_flash_physical_get_valid_flags(void)
 {
 	return EC_FLASH_PROTECT_RO_AT_BOOT |
 	       EC_FLASH_PROTECT_RO_NOW |
 	       EC_FLASH_PROTECT_ALL_NOW;
 }
 
-uint32_t flash_physical_get_writable_flags(uint32_t cur_flags)
+uint32_t crec_flash_physical_get_writable_flags(uint32_t cur_flags)
 {
 	uint32_t ret = 0;
 
@@ -161,7 +161,7 @@ uint32_t flash_physical_get_writable_flags(uint32_t cur_flags)
 	return ret;
 }
 
-int flash_physical_restore_state(void)
+int crec_flash_physical_restore_state(void)
 {
 	uint32_t reset_flags = system_get_reset_flags();
 	int version, size;
diff --git a/chip/stm32/flash-stm32g4-l4.c b/chip/stm32/flash-stm32g4-l4.c
index c04c17bb3b..ff8ca34b52 100644
--- a/chip/stm32/flash-stm32g4-l4.c
+++ b/chip/stm32/flash-stm32g4-l4.c
@@ -330,7 +330,7 @@ static void unprotect_all_blocks(void)
 	commit_optb();
 }
 
-int flash_physical_protect_at_boot(uint32_t new_flags)
+int crec_flash_physical_protect_at_boot(uint32_t new_flags)
 {
 	struct wrp_info wrp_ro;
 	struct wrp_info wrp_rw;
@@ -411,7 +411,7 @@ int flash_physical_protect_at_boot(uint32_t new_flags)
  */
 static int registers_need_reset(void)
 {
-	uint32_t flags = flash_get_protect();
+	uint32_t flags = crec_flash_get_protect();
 	int ro_at_boot = (flags & EC_FLASH_PROTECT_RO_AT_BOOT) ? 1 : 0;
 	/* The RO region is write-protected by the WRP1AR range. */
 	uint32_t wrp1ar = STM32_OPTB_WRP1AR;
@@ -426,7 +426,7 @@ static int registers_need_reset(void)
 /*****************************************************************************/
 /* Physical layer APIs */
 
-int flash_physical_write(int offset, int size, const char *data)
+int crec_flash_physical_write(int offset, int size, const char *data)
 {
 	uint32_t *address = (void *)(CONFIG_PROGRAM_MEMORY_BASE + offset);
 	int res = EC_SUCCESS;
@@ -501,7 +501,7 @@ exit_wr:
 	return res;
 }
 
-int flash_physical_erase(int offset, int size)
+int crec_flash_physical_erase(int offset, int size)
 {
 	int res = EC_SUCCESS;
 	int pg;
@@ -560,7 +560,7 @@ exit_er:
 	return res;
 }
 
-int flash_physical_get_protect(int block)
+int crec_flash_physical_get_protect(int block)
 {
 	struct wrp_info wrp_ro;
 	struct wrp_info wrp_rw;
@@ -576,7 +576,7 @@ int flash_physical_get_protect(int block)
  * Note: This does not need to update _NOW flags, as get_protect_flags
  * in common code already does so.
  */
-uint32_t flash_physical_get_protect_flags(void)
+uint32_t crec_flash_physical_get_protect_flags(void)
 {
 	uint32_t flags = 0;
 	struct wrp_info wrp_ro;
@@ -610,12 +610,12 @@ uint32_t flash_physical_get_protect_flags(void)
 	return flags;
 }
 
-int flash_physical_protect_now(int all)
+int crec_flash_physical_protect_now(int all)
 {
 	return EC_ERROR_INVAL;
 }
 
-uint32_t flash_physical_get_valid_flags(void)
+uint32_t crec_flash_physical_get_valid_flags(void)
 {
 	return EC_FLASH_PROTECT_RO_AT_BOOT |
 	       EC_FLASH_PROTECT_RO_NOW |
@@ -631,7 +631,7 @@ uint32_t flash_physical_get_valid_flags(void)
 	       EC_FLASH_PROTECT_ALL_NOW;
 }
 
-uint32_t flash_physical_get_writable_flags(uint32_t cur_flags)
+uint32_t crec_flash_physical_get_writable_flags(uint32_t cur_flags)
 {
 	uint32_t ret = 0;
 
@@ -662,10 +662,10 @@ uint32_t flash_physical_get_writable_flags(uint32_t cur_flags)
 	return ret;
 }
 
-int flash_pre_init(void)
+int crec_flash_pre_init(void)
 {
 	uint32_t reset_flags = system_get_reset_flags();
-	uint32_t prot_flags = flash_get_protect();
+	uint32_t prot_flags = crec_flash_get_protect();
 	int need_reset = 0;
 
 	/*
@@ -684,7 +684,7 @@ int flash_pre_init(void)
 			 * update to the write protect register and reboot so
 			 * it takes effect.
 			 */
-			flash_physical_protect_at_boot(
+			crec_flash_physical_protect_at_boot(
 				EC_FLASH_PROTECT_RO_AT_BOOT);
 			need_reset = 1;
 		}
@@ -698,7 +698,7 @@ int flash_pre_init(void)
 			 * to the check above.  One of them should be able to
 			 * go away.
 			 */
-			flash_protect_at_boot(
+			crec_flash_protect_at_boot(
 				prot_flags & EC_FLASH_PROTECT_RO_AT_BOOT);
 			need_reset = 1;
 		}
@@ -713,7 +713,8 @@ int flash_pre_init(void)
 		}
 	}
 
-	if ((flash_physical_get_valid_flags() & EC_FLASH_PROTECT_ALL_AT_BOOT) &&
+	if ((crec_flash_physical_get_valid_flags() &
+	    EC_FLASH_PROTECT_ALL_AT_BOOT) &&
 	    (!!(prot_flags & EC_FLASH_PROTECT_ALL_AT_BOOT) !=
 	     !!(prot_flags & EC_FLASH_PROTECT_ALL_NOW))) {
 		/*
@@ -728,7 +729,8 @@ int flash_pre_init(void)
 	}
 
 #ifdef CONFIG_FLASH_PROTECT_RW
-	if ((flash_physical_get_valid_flags() & EC_FLASH_PROTECT_RW_AT_BOOT) &&
+	if ((crec_flash_physical_get_valid_flags() &
+	    EC_FLASH_PROTECT_RW_AT_BOOT) &&
 	    (!!(prot_flags & EC_FLASH_PROTECT_RW_AT_BOOT) !=
 	     !!(prot_flags & EC_FLASH_PROTECT_RW_NOW))) {
 		/* RW_AT_BOOT and RW_NOW do not match. */
@@ -737,7 +739,7 @@ int flash_pre_init(void)
 #endif
 
 #ifdef CONFIG_ROLLBACK
-	if ((flash_physical_get_valid_flags() &
+	if ((crec_flash_physical_get_valid_flags() &
 	     EC_FLASH_PROTECT_ROLLBACK_AT_BOOT) &&
 	    (!!(prot_flags & EC_FLASH_PROTECT_ROLLBACK_AT_BOOT) !=
 	     !!(prot_flags & EC_FLASH_PROTECT_ROLLBACK_NOW))) {
diff --git a/chip/stm32/flash-stm32h7.c b/chip/stm32/flash-stm32h7.c
index e020e1af1d..6c8c797c41 100644
--- a/chip/stm32/flash-stm32h7.c
+++ b/chip/stm32/flash-stm32h7.c
@@ -287,7 +287,7 @@ static int set_wp(int enabled)
 /*****************************************************************************/
 /* Physical layer APIs */
 
-int flash_physical_write(int offset, int size, const char *data)
+int crec_flash_physical_write(int offset, int size, const char *data)
 {
 	int res = EC_SUCCESS;
 	int bank = offset / HWBANK_SIZE;
@@ -365,7 +365,7 @@ exit_wr:
 	return res;
 }
 
-int flash_physical_erase(int offset, int size)
+int crec_flash_physical_erase(int offset, int size)
 {
 	int res = EC_SUCCESS;
 	int bank = offset / HWBANK_SIZE;
@@ -441,7 +441,7 @@ exit_er:
 	return res;
 }
 
-int flash_physical_get_protect(int block)
+int crec_flash_physical_get_protect(int block)
 {
 	int bank = block / BLOCKS_PER_HWBANK;
 	int index = block % BLOCKS_PER_HWBANK;
@@ -453,7 +453,7 @@ int flash_physical_get_protect(int block)
  * Note: This does not need to update _NOW flags, as flash_get_protect
  * in common code already does so.
  */
-uint32_t flash_physical_get_protect_flags(void)
+uint32_t crec_flash_physical_get_protect_flags(void)
 {
 	uint32_t flags = 0;
 
@@ -473,7 +473,7 @@ uint32_t flash_physical_get_protect_flags(void)
 #define WP_RANGE(start, count) (((1 << (count)) - 1) << (start))
 #define RO_WP_RANGE WP_RANGE(WP_BANK_OFFSET, WP_BANK_COUNT)
 
-int flash_physical_protect_now(int all)
+int crec_flash_physical_protect_now(int all)
 {
 	protect_blocks(RO_WP_RANGE);
 
@@ -499,7 +499,7 @@ int flash_physical_protect_now(int all)
 	return EC_SUCCESS;
 }
 
-int flash_physical_protect_at_boot(uint32_t new_flags)
+int crec_flash_physical_protect_at_boot(uint32_t new_flags)
 {
 	int new_wp_enable = !!(new_flags & EC_FLASH_PROTECT_RO_AT_BOOT);
 
@@ -509,14 +509,14 @@ int flash_physical_protect_at_boot(uint32_t new_flags)
 	return EC_SUCCESS;
 }
 
-uint32_t flash_physical_get_valid_flags(void)
+uint32_t crec_flash_physical_get_valid_flags(void)
 {
 	return EC_FLASH_PROTECT_RO_AT_BOOT |
 	       EC_FLASH_PROTECT_RO_NOW |
 	       EC_FLASH_PROTECT_ALL_NOW;
 }
 
-uint32_t flash_physical_get_writable_flags(uint32_t cur_flags)
+uint32_t crec_flash_physical_get_writable_flags(uint32_t cur_flags)
 {
 	uint32_t ret = 0;
 
@@ -535,7 +535,7 @@ uint32_t flash_physical_get_writable_flags(uint32_t cur_flags)
 	return ret;
 }
 
-int flash_physical_restore_state(void)
+int crec_flash_physical_restore_state(void)
 {
 	uint32_t reset_flags = system_get_reset_flags();
 	int version, size;
@@ -561,14 +561,14 @@ int flash_physical_restore_state(void)
 	return 0;
 }
 
-int flash_pre_init(void)
+int crec_flash_pre_init(void)
 {
 	uint32_t reset_flags = system_get_reset_flags();
-	uint32_t prot_flags = flash_get_protect();
+	uint32_t prot_flags = crec_flash_get_protect();
 	uint32_t unwanted_prot_flags = EC_FLASH_PROTECT_ALL_NOW |
 		EC_FLASH_PROTECT_ERROR_INCONSISTENT;
 
-	if (flash_physical_restore_state())
+	if (crec_flash_physical_restore_state())
 		return EC_SUCCESS;
 
 	/*
@@ -587,13 +587,13 @@ int flash_pre_init(void)
 		    !(prot_flags & EC_FLASH_PROTECT_RO_NOW)) {
 			int rv;
 
-			rv = flash_set_protect(EC_FLASH_PROTECT_RO_NOW,
-					       EC_FLASH_PROTECT_RO_NOW);
+			rv = crec_flash_set_protect(EC_FLASH_PROTECT_RO_NOW,
+						    EC_FLASH_PROTECT_RO_NOW);
 			if (rv)
 				return rv;
 
 			/* Re-read flags */
-			prot_flags = flash_get_protect();
+			prot_flags = crec_flash_get_protect();
 		}
 	} else {
 		/* Don't want RO flash protected */
diff --git a/chip/stm32/flash-stm32l.c b/chip/stm32/flash-stm32l.c
index a151a26cf8..f34200219a 100644
--- a/chip/stm32/flash-stm32l.c
+++ b/chip/stm32/flash-stm32l.c
@@ -158,7 +158,7 @@ void  __attribute__((section(".iram.text")))
 	STM32_FLASH_PECR &= ~(STM32_FLASH_PECR_PROG | STM32_FLASH_PECR_FPRG);
 }
 
-int flash_physical_write(int offset, int size, const char *data)
+int crec_flash_physical_write(int offset, int size, const char *data)
 {
 	uint32_t *data32 = (uint32_t *)data;
 	uint32_t *address = (uint32_t *)(CONFIG_PROGRAM_MEMORY_BASE + offset);
@@ -240,7 +240,7 @@ exit_wr:
 	return res;
 }
 
-int flash_physical_erase(int offset, int size)
+int crec_flash_physical_erase(int offset, int size)
 {
 	uint32_t *address;
 	int res = EC_SUCCESS;
@@ -261,7 +261,7 @@ int flash_physical_erase(int offset, int size)
 		timestamp_t deadline;
 
 		/* Do nothing if already erased */
-		if (flash_is_erased((uint32_t)address -
+		if (crec_flash_is_erased((uint32_t)address -
 				    CONFIG_PROGRAM_MEMORY_BASE,
 				    CONFIG_FLASH_ERASE_SIZE))
 			continue;
@@ -304,20 +304,20 @@ exit_er:
 	return res;
 }
 
-int flash_physical_get_protect(int block)
+int crec_flash_physical_get_protect(int block)
 {
 	/*
 	 * If the entire flash interface is locked, then all blocks are
 	 * protected until reboot.
 	 */
-	if (flash_physical_get_protect_flags() & EC_FLASH_PROTECT_ALL_NOW)
+	if (crec_flash_physical_get_protect_flags() & EC_FLASH_PROTECT_ALL_NOW)
 		return 1;
 
 	/* Check the active write protect status */
 	return STM32_FLASH_WRPR & BIT(block);
 }
 
-int flash_physical_protect_at_boot(uint32_t new_flags)
+int crec_flash_physical_protect_at_boot(uint32_t new_flags)
 {
 	uint32_t prot;
 	uint32_t mask = (BIT(WP_BANK_COUNT) - 1) << WP_BANK_OFFSET;
@@ -352,7 +352,7 @@ int flash_physical_protect_at_boot(uint32_t new_flags)
 	return EC_SUCCESS;
 }
 
-int flash_physical_force_reload(void)
+int crec_flash_physical_force_reload(void)
 {
 	int rv = unlock(STM32_FLASH_PECR_OPT_LOCK);
 
@@ -367,7 +367,7 @@ int flash_physical_force_reload(void)
 	return EC_ERROR_UNKNOWN;
 }
 
-uint32_t flash_physical_get_protect_flags(void)
+uint32_t crec_flash_physical_get_protect_flags(void)
 {
 	uint32_t flags = 0;
 
@@ -382,7 +382,7 @@ uint32_t flash_physical_get_protect_flags(void)
 	return flags;
 }
 
-int flash_physical_protect_now(int all)
+int crec_flash_physical_protect_now(int all)
 {
 	if (all) {
 		/* Re-lock the registers if they're unlocked */
@@ -400,14 +400,14 @@ int flash_physical_protect_now(int all)
 	}
 }
 
-uint32_t flash_physical_get_valid_flags(void)
+uint32_t crec_flash_physical_get_valid_flags(void)
 {
 	return EC_FLASH_PROTECT_RO_AT_BOOT |
 	       EC_FLASH_PROTECT_RO_NOW |
 	       EC_FLASH_PROTECT_ALL_NOW;
 }
 
-uint32_t flash_physical_get_writable_flags(uint32_t cur_flags)
+uint32_t crec_flash_physical_get_writable_flags(uint32_t cur_flags)
 {
 	uint32_t ret = 0;
 
@@ -426,10 +426,10 @@ uint32_t flash_physical_get_writable_flags(uint32_t cur_flags)
 	return ret;
 }
 
-int flash_pre_init(void)
+int crec_flash_pre_init(void)
 {
 	uint32_t reset_flags = system_get_reset_flags();
-	uint32_t prot_flags = flash_get_protect();
+	uint32_t prot_flags = crec_flash_get_protect();
 	int need_reset = 0;
 
 	/*
@@ -448,7 +448,7 @@ int flash_pre_init(void)
 			 * update to the write protect register and reboot so
 			 * it takes effect.
 			 */
-			flash_protect_at_boot(EC_FLASH_PROTECT_RO_AT_BOOT);
+			crec_flash_protect_at_boot(EC_FLASH_PROTECT_RO_AT_BOOT);
 			need_reset = 1;
 		}
 
@@ -457,7 +457,7 @@ int flash_pre_init(void)
 			 * Write protect register was in an inconsistent state.
 			 * Set it back to a good state and reboot.
 			 */
-			flash_protect_at_boot(prot_flags &
+			crec_flash_protect_at_boot(prot_flags &
 					EC_FLASH_PROTECT_RO_AT_BOOT);
 			need_reset = 1;
 		}
diff --git a/chip/stm32/otp-stm32f4.c b/chip/stm32/otp-stm32f4.c
index a993af7042..45ce38d159 100644
--- a/chip/stm32/otp-stm32f4.c
+++ b/chip/stm32/otp-stm32f4.c
@@ -39,9 +39,9 @@ static int otp_write(uint8_t block, int size, const char *data)
 		return EC_ERROR_PARAM1;
 	if (size >= STM32_OTP_BLOCK_SIZE)
 		return EC_ERROR_PARAM2;
-	return flash_physical_write(STM32_OTP_BLOCK_DATA(block, 0) -
-				    CONFIG_PROGRAM_MEMORY_BASE,
-				    size * sizeof(uint32_t), data);
+	return crec_flash_physical_write(STM32_OTP_BLOCK_DATA(block, 0) -
+					 CONFIG_PROGRAM_MEMORY_BASE,
+					 size * sizeof(uint32_t), data);
 }
 
 /*
@@ -73,9 +73,9 @@ static int otp_set_protect(uint8_t block)
 
 	lock = REG32(STM32_OTP_LOCK(block));
 	lock &= ~STM32_OPT_LOCK_MASK(block);
-	rv = flash_physical_write(STM32_OTP_LOCK(block) -
-				  CONFIG_PROGRAM_MEMORY_BASE,
-				  sizeof(uint32_t), (char *)&lock);
+	rv = crec_flash_physical_write(STM32_OTP_LOCK(block) -
+				       CONFIG_PROGRAM_MEMORY_BASE,
+				       sizeof(uint32_t), (char *)&lock);
 	if (rv)
 		return rv;
 	else
diff --git a/chip/stm32/system.c b/chip/stm32/system.c
index 8367ae2a12..1a9da8c3a4 100644
--- a/chip/stm32/system.c
+++ b/chip/stm32/system.c
@@ -393,7 +393,7 @@ void system_reset(int flags)
 		 * Ask the flash module to reboot, so that we reload the
 		 * option bytes.
 		 */
-		flash_physical_force_reload();
+		crec_flash_physical_force_reload();
 
 		/* Fall through to watchdog if that fails */
 #endif