diff options
author | Shawn Nematbakhsh <shawnn@chromium.org> | 2015-09-04 19:09:33 -0700 |
---|---|---|
committer | chrome-bot <chrome-bot@chromium.org> | 2015-09-16 14:49:31 -0700 |
commit | d58e54730c03290296df5bb65cb84264e4b2facc (patch) | |
tree | d736570c84a0e9737b8881ec68b073327a5c2ae5 /chip/stm32 | |
parent | 4b3c13ddfefd229dde49fb4cbf5a6bfc49f64973 (diff) | |
download | chrome-ec-d58e54730c03290296df5bb65cb84264e4b2facc.tar.gz |
cleanup: Rename geometry constants
Rename and add geometry constants to match spec doc -
https://goo.gl/fnzTvr.
CONFIG_FLASH_BASE becomes CONFIG_PROGRAM_MEMORY_BASE
CONFIG_FLASH_MAPPED becomes CONFIG_MAPPED_STORAGE
Add CONFIG_INTERNAL_STORAGE, CONFIG_EXTERNAL_STORAGE and
CONFIG_MAPPED_STORAGE_BASE where appropriate.
This CL leaves chip/npcx in a broken state -- it's fixed in a follow-up
CL.
BRANCH=None
BUG=chrome-os-partner:23796
TEST=With entire patch series, on both Samus and Glados:
- Verify 'version' EC console command is correct
- Verify 'flashrom -p ec -r read.bin' reads back EC image
- Verify software sync correctly flashes both EC and PD RW images
Change-Id: Idb3c4ed9f7f6edd0a6d49ad11753eba713e67a80
Signed-off-by: Shawn Nematbakhsh <shawnn@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/297484
Commit-Ready: Shawn N <shawnn@chromium.org>
Tested-by: Shawn N <shawnn@chromium.org>
Reviewed-by: Randall Spangler <rspangler@chromium.org>
Diffstat (limited to 'chip/stm32')
-rw-r--r-- | chip/stm32/config-stm32f03x.h | 1 | ||||
-rw-r--r-- | chip/stm32/config-stm32f05x.h | 1 | ||||
-rw-r--r-- | chip/stm32/config-stm32f07x.h | 1 | ||||
-rw-r--r-- | chip/stm32/config-stm32f09x.h | 1 | ||||
-rw-r--r-- | chip/stm32/config-stm32f373.h | 1 | ||||
-rw-r--r-- | chip/stm32/config-stm32l100.h | 1 | ||||
-rw-r--r-- | chip/stm32/config-stm32l15x.h | 1 | ||||
-rw-r--r-- | chip/stm32/config-stm32ts60.h | 1 | ||||
-rw-r--r-- | chip/stm32/config_chip.h | 2 | ||||
-rw-r--r-- | chip/stm32/flash-f.c | 4 | ||||
-rw-r--r-- | chip/stm32/flash-stm32l.c | 7 |
11 files changed, 8 insertions, 13 deletions
diff --git a/chip/stm32/config-stm32f03x.h b/chip/stm32/config-stm32f03x.h index 18c8806908..3cb6e955bd 100644 --- a/chip/stm32/config-stm32f03x.h +++ b/chip/stm32/config-stm32f03x.h @@ -4,7 +4,6 @@ */ /* Memory mapping */ -#define CONFIG_FLASH_BASE 0x08000000 #define CONFIG_FLASH_PHYSICAL_SIZE 0x00008000 #define CONFIG_FLASH_BANK_SIZE 0x1000 #define CONFIG_FLASH_ERASE_SIZE 0x0400 /* erase bank size */ diff --git a/chip/stm32/config-stm32f05x.h b/chip/stm32/config-stm32f05x.h index 9b1701a407..e312e61cfd 100644 --- a/chip/stm32/config-stm32f05x.h +++ b/chip/stm32/config-stm32f05x.h @@ -4,7 +4,6 @@ */ /* Memory mapping */ -#define CONFIG_FLASH_BASE 0x08000000 #define CONFIG_FLASH_PHYSICAL_SIZE (64 * 1024) #define CONFIG_FLASH_BANK_SIZE 0x1000 #define CONFIG_FLASH_ERASE_SIZE 0x0800 /* erase bank size */ diff --git a/chip/stm32/config-stm32f07x.h b/chip/stm32/config-stm32f07x.h index 45b340355c..07e50d8d32 100644 --- a/chip/stm32/config-stm32f07x.h +++ b/chip/stm32/config-stm32f07x.h @@ -4,7 +4,6 @@ */ /* Memory mapping */ -#define CONFIG_FLASH_BASE 0x08000000 #define CONFIG_FLASH_PHYSICAL_SIZE (128 * 1024) #define CONFIG_FLASH_BANK_SIZE 0x1000 #define CONFIG_FLASH_ERASE_SIZE 0x0800 /* erase bank size */ diff --git a/chip/stm32/config-stm32f09x.h b/chip/stm32/config-stm32f09x.h index fe73db195f..29a0cd248b 100644 --- a/chip/stm32/config-stm32f09x.h +++ b/chip/stm32/config-stm32f09x.h @@ -4,7 +4,6 @@ */ /* Memory mapping */ -#define CONFIG_FLASH_BASE 0x08000000 #define CONFIG_FLASH_PHYSICAL_SIZE 0x00040000 #define CONFIG_FLASH_BANK_SIZE 0x2000 #define CONFIG_FLASH_ERASE_SIZE 0x0800 /* erase bank size */ diff --git a/chip/stm32/config-stm32f373.h b/chip/stm32/config-stm32f373.h index 42857af2c9..eca9bf58f8 100644 --- a/chip/stm32/config-stm32f373.h +++ b/chip/stm32/config-stm32f373.h @@ -4,7 +4,6 @@ */ /* Memory mapping */ -#define CONFIG_FLASH_BASE 0x08000000 #define CONFIG_FLASH_PHYSICAL_SIZE 0x00040000 #define CONFIG_FLASH_BANK_SIZE 0x2000 #define CONFIG_FLASH_ERASE_SIZE 0x0800 /* erase bank size */ diff --git a/chip/stm32/config-stm32l100.h b/chip/stm32/config-stm32l100.h index e751e396cd..2e4f10ad6e 100644 --- a/chip/stm32/config-stm32l100.h +++ b/chip/stm32/config-stm32l100.h @@ -4,7 +4,6 @@ */ /* Memory mapping */ -#define CONFIG_FLASH_BASE 0x08000000 #define CONFIG_FLASH_PHYSICAL_SIZE 0x00020000 #define CONFIG_FLASH_BANK_SIZE 0x1000 #define CONFIG_FLASH_ERASE_SIZE 0x0100 /* erase bank size */ diff --git a/chip/stm32/config-stm32l15x.h b/chip/stm32/config-stm32l15x.h index dc897253aa..480a0dcbee 100644 --- a/chip/stm32/config-stm32l15x.h +++ b/chip/stm32/config-stm32l15x.h @@ -4,7 +4,6 @@ */ /* Memory mapping */ -#define CONFIG_FLASH_BASE 0x08000000 #define CONFIG_FLASH_PHYSICAL_SIZE 0x00020000 #define CONFIG_FLASH_BANK_SIZE 0x1000 #define CONFIG_FLASH_ERASE_SIZE 0x0100 /* erase bank size */ diff --git a/chip/stm32/config-stm32ts60.h b/chip/stm32/config-stm32ts60.h index 540855c724..fc6375f20d 100644 --- a/chip/stm32/config-stm32ts60.h +++ b/chip/stm32/config-stm32ts60.h @@ -4,7 +4,6 @@ */ /* Memory mapping */ -#define CONFIG_FLASH_BASE 0x08000000 #define CONFIG_FLASH_PHYSICAL_SIZE 0x0010000 /* Actually 0x8000 */ #define CONFIG_FLASH_BANK_SIZE 0x1000 /* TODO */ #define CONFIG_FLASH_ERASE_SIZE 0x0400 /* TODO erase bank size */ diff --git a/chip/stm32/config_chip.h b/chip/stm32/config_chip.h index be115b5cf9..b2fdecdc2f 100644 --- a/chip/stm32/config_chip.h +++ b/chip/stm32/config_chip.h @@ -43,6 +43,8 @@ #error "Unsupported chip variant" #endif +#define CONFIG_PROGRAM_MEMORY_BASE 0x08000000 + #include "config_std_internal_flash.h" /* System stack size */ diff --git a/chip/stm32/flash-f.c b/chip/stm32/flash-f.c index a1d148a104..c57f072fc2 100644 --- a/chip/stm32/flash-f.c +++ b/chip/stm32/flash-f.c @@ -205,7 +205,7 @@ static int write_optb(int byte, uint8_t value) int flash_physical_write(int offset, int size, const char *data) { - uint16_t *address = (uint16_t *)(CONFIG_FLASH_BASE + offset); + uint16_t *address = (uint16_t *)(CONFIG_PROGRAM_MEMORY_BASE + offset); int res = EC_SUCCESS; int i; @@ -285,7 +285,7 @@ int flash_physical_erase(int offset, int size) continue; /* select page to erase */ - STM32_FLASH_AR = CONFIG_FLASH_BASE + offset; + STM32_FLASH_AR = CONFIG_PROGRAM_MEMORY_BASE + offset; /* set STRT bit : start erase */ STM32_FLASH_CR |= STRT; diff --git a/chip/stm32/flash-stm32l.c b/chip/stm32/flash-stm32l.c index 5a84d31f46..ce292bb58d 100644 --- a/chip/stm32/flash-stm32l.c +++ b/chip/stm32/flash-stm32l.c @@ -161,7 +161,7 @@ void __attribute__((section(".iram.text"))) int flash_physical_write(int offset, int size, const char *data) { uint32_t *data32 = (uint32_t *)data; - uint32_t *address = (uint32_t *)(CONFIG_FLASH_BASE + offset); + uint32_t *address = (uint32_t *)(CONFIG_PROGRAM_MEMORY_BASE + offset); int res = EC_SUCCESS; int word_mode = 0; int i; @@ -255,13 +255,14 @@ int flash_physical_erase(int offset, int size) /* Set PROG and ERASE bits */ STM32_FLASH_PECR |= STM32_FLASH_PECR_PROG | STM32_FLASH_PECR_ERASE; - for (address = (uint32_t *)(CONFIG_FLASH_BASE + offset); + for (address = (uint32_t *)(CONFIG_PROGRAM_MEMORY_BASE + offset); size > 0; size -= CONFIG_FLASH_ERASE_SIZE, address += CONFIG_FLASH_ERASE_SIZE / sizeof(uint32_t)) { timestamp_t deadline; /* Do nothing if already erased */ - if (flash_is_erased((uint32_t)address - CONFIG_FLASH_BASE, + if (flash_is_erased((uint32_t)address - + CONFIG_PROGRAM_MEMORY_BASE, CONFIG_FLASH_ERASE_SIZE)) continue; |