chip/stm32: Remove duplicate macros

Re-defining a macro is an error in C++.

BRANCH=none
BUG=b:144959033
TEST=make buildall
TEST=./util/compare_build.sh --boards all --ref1 HEAD --ref2 HEAD^

Signed-off-by: Tom Hughes <tomhughes@chromium.org>
Change-Id: If8329bc9e79e153961c8ddfb4ddb1c01cdb9b112
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2740562
Reviewed-by: Craig Hesling <hesling@chromium.org>

3 files changed, 0 insertions, 171 deletions

diff --git a/chip/stm32/registers-stm32f0.h b/chip/stm32/registers-stm32f0.h
index 442edaed9a..ee4963777b 100644
--- a/chip/stm32/registers-stm32f0.h
+++ b/chip/stm32/registers-stm32f0.h
@@ -843,81 +843,6 @@ typedef volatile struct stm32_dma_regs stm32_dma_regs_t;
 #define STM32_CRC_CR_REV_IN_WORD    (3 << 5)
 #define STM32_CRC_CR_REV_OUT        BIT(7)
 
-/* --- PMSE --- */
-#define STM32_PMSE_ARCR             REG32(STM32_PMSE_BASE + 0x0)
-#define STM32_PMSE_ACCR             REG32(STM32_PMSE_BASE + 0x4)
-#define STM32_PMSE_CR               REG32(STM32_PMSE_BASE + 0x8)
-#define STM32_PMSE_CRTDR            REG32(STM32_PMSE_BASE + 0x14)
-#define STM32_PMSE_IER              REG32(STM32_PMSE_BASE + 0x18)
-#define STM32_PMSE_SR               REG32(STM32_PMSE_BASE + 0x1c)
-#define STM32_PMSE_IFCR             REG32(STM32_PMSE_BASE + 0x20)
-#define STM32_PMSE_PxPMR(x)         REG32(STM32_PMSE_BASE + 0x2c + (x) * 4)
-#define STM32_PMSE_PAPMR            REG32(STM32_PMSE_BASE + 0x2c)
-#define STM32_PMSE_PBPMR            REG32(STM32_PMSE_BASE + 0x30)
-#define STM32_PMSE_PCPMR            REG32(STM32_PMSE_BASE + 0x34)
-#define STM32_PMSE_PDPMR            REG32(STM32_PMSE_BASE + 0x38)
-#define STM32_PMSE_PEPMR            REG32(STM32_PMSE_BASE + 0x3c)
-#define STM32_PMSE_PFPMR            REG32(STM32_PMSE_BASE + 0x40)
-#define STM32_PMSE_PGPMR            REG32(STM32_PMSE_BASE + 0x44)
-#define STM32_PMSE_PHPMR            REG32(STM32_PMSE_BASE + 0x48)
-#define STM32_PMSE_PIPMR            REG32(STM32_PMSE_BASE + 0x4c)
-#define STM32_PMSE_MRCR             REG32(STM32_PMSE_BASE + 0x100)
-#define STM32_PMSE_MCCR             REG32(STM32_PMSE_BASE + 0x104)
-
-/* --- USB --- */
-#define STM32_USB_EP(n)            REG16(STM32_USB_FS_BASE + (n) * 4)
-
-#define STM32_USB_CNTR             REG16(STM32_USB_FS_BASE + 0x40)
-
-#define STM32_USB_CNTR_FRES	    BIT(0)
-#define STM32_USB_CNTR_PDWN	    BIT(1)
-#define STM32_USB_CNTR_LP_MODE	    BIT(2)
-#define STM32_USB_CNTR_FSUSP	    BIT(3)
-#define STM32_USB_CNTR_RESUME	    BIT(4)
-#define STM32_USB_CNTR_L1RESUME	    BIT(5)
-#define STM32_USB_CNTR_L1REQM	    BIT(7)
-#define STM32_USB_CNTR_ESOFM	    BIT(8)
-#define STM32_USB_CNTR_SOFM	    BIT(9)
-#define STM32_USB_CNTR_RESETM	    BIT(10)
-#define STM32_USB_CNTR_SUSPM	    BIT(11)
-#define STM32_USB_CNTR_WKUPM	    BIT(12)
-#define STM32_USB_CNTR_ERRM	    BIT(13)
-#define STM32_USB_CNTR_PMAOVRM	    BIT(14)
-#define STM32_USB_CNTR_CTRM	    BIT(15)
-
-#define STM32_USB_ISTR             REG16(STM32_USB_FS_BASE + 0x44)
-
-#define STM32_USB_ISTR_EP_ID_MASK   (0x000f)
-#define STM32_USB_ISTR_DIR	    BIT(4)
-#define STM32_USB_ISTR_L1REQ	    BIT(7)
-#define STM32_USB_ISTR_ESOF	    BIT(8)
-#define STM32_USB_ISTR_SOF	    BIT(9)
-#define STM32_USB_ISTR_RESET	    BIT(10)
-#define STM32_USB_ISTR_SUSP	    BIT(11)
-#define STM32_USB_ISTR_WKUP	    BIT(12)
-#define STM32_USB_ISTR_ERR	    BIT(13)
-#define STM32_USB_ISTR_PMAOVR	    BIT(14)
-#define STM32_USB_ISTR_CTR	    BIT(15)
-
-#define STM32_USB_FNR              REG16(STM32_USB_FS_BASE + 0x48)
-
-#define STM32_USB_FNR_RXDP_RXDM_SHIFT (14)
-#define STM32_USB_FNR_RXDP_RXDM_MASK  (3 << STM32_USB_FNR_RXDP_RXDM_SHIFT)
-
-#define STM32_USB_DADDR            REG16(STM32_USB_FS_BASE + 0x4C)
-#define STM32_USB_BTABLE           REG16(STM32_USB_FS_BASE + 0x50)
-#define STM32_USB_LPMCSR           REG16(STM32_USB_FS_BASE + 0x54)
-#define STM32_USB_BCDR             REG16(STM32_USB_FS_BASE + 0x58)
-
-#define STM32_USB_BCDR_BCDEN	    BIT(0)
-#define STM32_USB_BCDR_DCDEN	    BIT(1)
-#define STM32_USB_BCDR_PDEN	    BIT(2)
-#define STM32_USB_BCDR_SDEN	    BIT(3)
-#define STM32_USB_BCDR_DCDET	    BIT(4)
-#define STM32_USB_BCDR_PDET	    BIT(5)
-#define STM32_USB_BCDR_SDET	    BIT(6)
-#define STM32_USB_BCDR_PS2DET	    BIT(7)
-
 #define EP_MASK     0x0F0F
 #define EP_TX_DTOG  0x0040
 #define EP_TX_MASK  0x0030
diff --git a/chip/stm32/registers-stm32f4.h b/chip/stm32/registers-stm32f4.h
index 065b8bb035..503a60cc64 100644
--- a/chip/stm32/registers-stm32f4.h
+++ b/chip/stm32/registers-stm32f4.h
@@ -1085,81 +1085,6 @@ typedef volatile struct stm32_dma_regs stm32_dma_regs_t;
 #define STM32_CRC_CR_REV_IN_WORD    (3 << 5)
 #define STM32_CRC_CR_REV_OUT        BIT(7)
 
-/* --- PMSE --- */
-#define STM32_PMSE_ARCR             REG32(STM32_PMSE_BASE + 0x0)
-#define STM32_PMSE_ACCR             REG32(STM32_PMSE_BASE + 0x4)
-#define STM32_PMSE_CR               REG32(STM32_PMSE_BASE + 0x8)
-#define STM32_PMSE_CRTDR            REG32(STM32_PMSE_BASE + 0x14)
-#define STM32_PMSE_IER              REG32(STM32_PMSE_BASE + 0x18)
-#define STM32_PMSE_SR               REG32(STM32_PMSE_BASE + 0x1c)
-#define STM32_PMSE_IFCR             REG32(STM32_PMSE_BASE + 0x20)
-#define STM32_PMSE_PxPMR(x)         REG32(STM32_PMSE_BASE + 0x2c + (x) * 4)
-#define STM32_PMSE_PAPMR            REG32(STM32_PMSE_BASE + 0x2c)
-#define STM32_PMSE_PBPMR            REG32(STM32_PMSE_BASE + 0x30)
-#define STM32_PMSE_PCPMR            REG32(STM32_PMSE_BASE + 0x34)
-#define STM32_PMSE_PDPMR            REG32(STM32_PMSE_BASE + 0x38)
-#define STM32_PMSE_PEPMR            REG32(STM32_PMSE_BASE + 0x3c)
-#define STM32_PMSE_PFPMR            REG32(STM32_PMSE_BASE + 0x40)
-#define STM32_PMSE_PGPMR            REG32(STM32_PMSE_BASE + 0x44)
-#define STM32_PMSE_PHPMR            REG32(STM32_PMSE_BASE + 0x48)
-#define STM32_PMSE_PIPMR            REG32(STM32_PMSE_BASE + 0x4c)
-#define STM32_PMSE_MRCR             REG32(STM32_PMSE_BASE + 0x100)
-#define STM32_PMSE_MCCR             REG32(STM32_PMSE_BASE + 0x104)
-
-/* --- USB --- */
-#define STM32_USB_EP(n)            REG16(STM32_USB_FS_BASE + (n) * 4)
-
-#define STM32_USB_CNTR             REG16(STM32_USB_FS_BASE + 0x40)
-
-#define STM32_USB_CNTR_FRES	    BIT(0)
-#define STM32_USB_CNTR_PDWN	    BIT(1)
-#define STM32_USB_CNTR_LP_MODE	    BIT(2)
-#define STM32_USB_CNTR_FSUSP	    BIT(3)
-#define STM32_USB_CNTR_RESUME	    BIT(4)
-#define STM32_USB_CNTR_L1RESUME	    BIT(5)
-#define STM32_USB_CNTR_L1REQM	    BIT(7)
-#define STM32_USB_CNTR_ESOFM	    BIT(8)
-#define STM32_USB_CNTR_SOFM	    BIT(9)
-#define STM32_USB_CNTR_RESETM	    BIT(10)
-#define STM32_USB_CNTR_SUSPM	    BIT(11)
-#define STM32_USB_CNTR_WKUPM	    BIT(12)
-#define STM32_USB_CNTR_ERRM	    BIT(13)
-#define STM32_USB_CNTR_PMAOVRM	    BIT(14)
-#define STM32_USB_CNTR_CTRM	    BIT(15)
-
-#define STM32_USB_ISTR             REG16(STM32_USB_FS_BASE + 0x44)
-
-#define STM32_USB_ISTR_EP_ID_MASK   (0x000f)
-#define STM32_USB_ISTR_DIR	    BIT(4)
-#define STM32_USB_ISTR_L1REQ	    BIT(7)
-#define STM32_USB_ISTR_ESOF	    BIT(8)
-#define STM32_USB_ISTR_SOF	    BIT(9)
-#define STM32_USB_ISTR_RESET	    BIT(10)
-#define STM32_USB_ISTR_SUSP	    BIT(11)
-#define STM32_USB_ISTR_WKUP	    BIT(12)
-#define STM32_USB_ISTR_ERR	    BIT(13)
-#define STM32_USB_ISTR_PMAOVR	    BIT(14)
-#define STM32_USB_ISTR_CTR	    BIT(15)
-
-#define STM32_USB_FNR              REG16(STM32_USB_FS_BASE + 0x48)
-
-#define STM32_USB_FNR_RXDP_RXDM_SHIFT (14)
-#define STM32_USB_FNR_RXDP_RXDM_MASK  (3 << STM32_USB_FNR_RXDP_RXDM_SHIFT)
-
-#define STM32_USB_DADDR            REG16(STM32_USB_FS_BASE + 0x4C)
-#define STM32_USB_BTABLE           REG16(STM32_USB_FS_BASE + 0x50)
-#define STM32_USB_LPMCSR           REG16(STM32_USB_FS_BASE + 0x54)
-#define STM32_USB_BCDR             REG16(STM32_USB_FS_BASE + 0x58)
-
-#define STM32_USB_BCDR_BCDEN	    BIT(0)
-#define STM32_USB_BCDR_DCDEN	    BIT(1)
-#define STM32_USB_BCDR_PDEN	    BIT(2)
-#define STM32_USB_BCDR_SDEN	    BIT(3)
-#define STM32_USB_BCDR_DCDET	    BIT(4)
-#define STM32_USB_BCDR_PDET	    BIT(5)
-#define STM32_USB_BCDR_SDET	    BIT(6)
-#define STM32_USB_BCDR_PS2DET	    BIT(7)
-
 #define EP_MASK     0x0F0F
 #define EP_TX_DTOG  0x0040
 #define EP_TX_MASK  0x0030
diff --git a/chip/stm32/registers-stm32l4.h b/chip/stm32/registers-stm32l4.h
index 9fd6302f49..d8bbf2f60d 100644
--- a/chip/stm32/registers-stm32l4.h
+++ b/chip/stm32/registers-stm32l4.h
@@ -831,27 +831,6 @@ typedef volatile struct stm32_dma_regs stm32_dma_regs_t;
 #define STM32_CRC_CR_REV_IN_WORD    (3 << 5)
 #define STM32_CRC_CR_REV_OUT        BIT(7)
 
-/* --- PMSE --- */
-#define STM32_PMSE_ARCR             REG32(STM32_PMSE_BASE + 0x0)
-#define STM32_PMSE_ACCR             REG32(STM32_PMSE_BASE + 0x4)
-#define STM32_PMSE_CR               REG32(STM32_PMSE_BASE + 0x8)
-#define STM32_PMSE_CRTDR            REG32(STM32_PMSE_BASE + 0x14)
-#define STM32_PMSE_IER              REG32(STM32_PMSE_BASE + 0x18)
-#define STM32_PMSE_SR               REG32(STM32_PMSE_BASE + 0x1c)
-#define STM32_PMSE_IFCR             REG32(STM32_PMSE_BASE + 0x20)
-#define STM32_PMSE_PxPMR(x)         REG32(STM32_PMSE_BASE + 0x2c + (x) * 4)
-#define STM32_PMSE_PAPMR            REG32(STM32_PMSE_BASE + 0x2c)
-#define STM32_PMSE_PBPMR            REG32(STM32_PMSE_BASE + 0x30)
-#define STM32_PMSE_PCPMR            REG32(STM32_PMSE_BASE + 0x34)
-#define STM32_PMSE_PDPMR            REG32(STM32_PMSE_BASE + 0x38)
-#define STM32_PMSE_PEPMR            REG32(STM32_PMSE_BASE + 0x3c)
-#define STM32_PMSE_PFPMR            REG32(STM32_PMSE_BASE + 0x40)
-#define STM32_PMSE_PGPMR            REG32(STM32_PMSE_BASE + 0x44)
-#define STM32_PMSE_PHPMR            REG32(STM32_PMSE_BASE + 0x48)
-#define STM32_PMSE_PIPMR            REG32(STM32_PMSE_BASE + 0x4c)
-#define STM32_PMSE_MRCR             REG32(STM32_PMSE_BASE + 0x100)
-#define STM32_PMSE_MCCR             REG32(STM32_PMSE_BASE + 0x104)
-
 /* --- USB --- */
 #define STM32_USB_EP(n)            REG16(STM32_USB_FS_BASE + (n) * 4)