Refactor CONFIG_FLASH_SIZE to CONFIG_FLASH_SIZE_BYTES

In Zephyr CONFIG_FLASH_SIZE is a Kconfig value that is used
throughout. The issue is that the units don't match. In
Zephyr the value is in KiB instead of bytes. This refactor
simply renames CONFIG_FLASH_SIZE in platform/ec to include
the unit (via _BYTES).

BRANCH=none
BUG=b:174873770
TEST=make buildall
be generated by the build instead of per board

Signed-off-by: Yuval Peress <peress@chromium.org>
Change-Id: I44bf3c7a20fcf62aaa9ae15715be78db4210f384
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2627638
Reviewed-by: Jack Rosenthal <jrosenth@chromium.org>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Tom Hughes <tomhughes@chromium.org>
Commit-Queue: Jack Rosenthal <jrosenth@chromium.org>

17 files changed, 31 insertions, 31 deletions

diff --git a/chip/stm32/config-stm32f03x.h b/chip/stm32/config-stm32f03x.h
index 84266cdbfc..3c51086c26 100644
--- a/chip/stm32/config-stm32f03x.h
+++ b/chip/stm32/config-stm32f03x.h
@@ -4,10 +4,10 @@
  */
 
 #ifdef CHIP_VARIANT_STM32F03X8
-#define CONFIG_FLASH_SIZE 0x00010000
+#define CONFIG_FLASH_SIZE_BYTES 0x00010000
 #define CONFIG_RAM_SIZE   0x00002000
 #else
-#define CONFIG_FLASH_SIZE 0x00008000
+#define CONFIG_FLASH_SIZE_BYTES 0x00008000
 #define CONFIG_RAM_SIZE   0x00001000
 #endif
 
diff --git a/chip/stm32/config-stm32f05x.h b/chip/stm32/config-stm32f05x.h
index cab7b62d50..00bf45fde5 100644
--- a/chip/stm32/config-stm32f05x.h
+++ b/chip/stm32/config-stm32f05x.h
@@ -4,7 +4,7 @@
  */
 
 /* Memory mapping */
-#define CONFIG_FLASH_SIZE (64 * 1024)
+#define CONFIG_FLASH_SIZE_BYTES (64 * 1024)
 #define CONFIG_FLASH_BANK_SIZE  0x1000
 #define CONFIG_FLASH_ERASE_SIZE 0x0400  /* erase bank size */
 #define CONFIG_FLASH_WRITE_SIZE 0x0002  /* minimum write size */
diff --git a/chip/stm32/config-stm32f07x.h b/chip/stm32/config-stm32f07x.h
index 199aef3361..918a117a22 100644
--- a/chip/stm32/config-stm32f07x.h
+++ b/chip/stm32/config-stm32f07x.h
@@ -4,7 +4,7 @@
  */
 
 /* Memory mapping */
-#define CONFIG_FLASH_SIZE (128 * 1024)
+#define CONFIG_FLASH_SIZE_BYTES (128 * 1024)
 #define CONFIG_FLASH_BANK_SIZE  0x1000
 #define CONFIG_FLASH_ERASE_SIZE 0x0800  /* erase bank size */
 #define CONFIG_FLASH_WRITE_SIZE 0x0002  /* minimum write size */
diff --git a/chip/stm32/config-stm32f09x.h b/chip/stm32/config-stm32f09x.h
index 3da8a342f2..9dc27a1fb2 100644
--- a/chip/stm32/config-stm32f09x.h
+++ b/chip/stm32/config-stm32f09x.h
@@ -8,7 +8,7 @@
  * Flash physical size: 256KB
  * Write protect sectors: 31 4KB sectors, one 132KB sector
  */
-#define CONFIG_FLASH_SIZE 0x00040000
+#define CONFIG_FLASH_SIZE_BYTES 0x00040000
 #define CONFIG_FLASH_BANK_SIZE  0x1000
 #define CONFIG_FLASH_ERASE_SIZE 0x0800  /* erase bank size */
 #define CONFIG_FLASH_WRITE_SIZE 0x0002  /* minimum write size */
@@ -62,7 +62,7 @@
 #define CONFIG_EC_PROTECTED_STORAGE_OFF  0
 #define CONFIG_EC_PROTECTED_STORAGE_SIZE CONFIG_RW_MEM_OFF
 #define CONFIG_EC_WRITABLE_STORAGE_OFF   CONFIG_RW_MEM_OFF
-#define CONFIG_EC_WRITABLE_STORAGE_SIZE  (CONFIG_FLASH_SIZE - \
+#define CONFIG_EC_WRITABLE_STORAGE_SIZE  (CONFIG_FLASH_SIZE_BYTES - \
 					  CONFIG_EC_WRITABLE_STORAGE_OFF)
 
 #define CONFIG_WP_STORAGE_OFF   CONFIG_EC_PROTECTED_STORAGE_OFF
diff --git a/chip/stm32/config-stm32f373.h b/chip/stm32/config-stm32f373.h
index b77b1d98a6..3df5bfce67 100644
--- a/chip/stm32/config-stm32f373.h
+++ b/chip/stm32/config-stm32f373.h
@@ -4,7 +4,7 @@
  */
 
 /* Memory mapping */
-#define CONFIG_FLASH_SIZE 0x00040000
+#define CONFIG_FLASH_SIZE_BYTES 0x00040000
 #define CONFIG_FLASH_BANK_SIZE  0x2000
 #define CONFIG_FLASH_ERASE_SIZE 0x0800  /* erase bank size */
 #define CONFIG_FLASH_WRITE_SIZE 0x0002  /* minimum write size */
diff --git a/chip/stm32/config-stm32f4.h b/chip/stm32/config-stm32f4.h
index c64cc3089a..60b1affd3c 100644
--- a/chip/stm32/config-stm32f4.h
+++ b/chip/stm32/config-stm32f4.h
@@ -5,9 +5,9 @@
 
 /* Memory mapping */
 #ifdef CHIP_VARIANT_STM32F412
-#	define CONFIG_FLASH_SIZE (1 * 1024 * 1024)
+#	define CONFIG_FLASH_SIZE_BYTES (1 * 1024 * 1024)
 #else
-#	define CONFIG_FLASH_SIZE (512 * 1024)
+#	define CONFIG_FLASH_SIZE_BYTES (512 * 1024)
 #endif
 
 /* 3 regions type: 16K, 64K and 128K */
@@ -16,7 +16,7 @@
 #define SIZE_128KB (128 * 1024)
 #define CONFIG_FLASH_REGION_TYPE_COUNT 3
 #define CONFIG_FLASH_MULTIPLE_REGION \
-	(5 + (CONFIG_FLASH_SIZE - SIZE_128KB) / SIZE_128KB)
+	(5 + (CONFIG_FLASH_SIZE_BYTES - SIZE_128KB) / SIZE_128KB)
 
 /* Erasing 128K can take up to 2s, need to defer erase. */
 #define CONFIG_FLASH_DEFERRED_ERASE
@@ -50,7 +50,7 @@
 #define CONFIG_EC_PROTECTED_STORAGE_SIZE	CONFIG_RW_MEM_OFF
 #define CONFIG_EC_WRITABLE_STORAGE_OFF		CONFIG_RW_MEM_OFF
 #define CONFIG_EC_WRITABLE_STORAGE_SIZE					\
-		 (CONFIG_FLASH_SIZE - CONFIG_EC_WRITABLE_STORAGE_OFF)
+		 (CONFIG_FLASH_SIZE_BYTES - CONFIG_EC_WRITABLE_STORAGE_OFF)
 
 #define CONFIG_WP_STORAGE_OFF		CONFIG_EC_PROTECTED_STORAGE_OFF
 #define CONFIG_WP_STORAGE_SIZE		CONFIG_EC_PROTECTED_STORAGE_SIZE
diff --git a/chip/stm32/config-stm32f76x.h b/chip/stm32/config-stm32f76x.h
index 665bec36bf..d027ad62fb 100644
--- a/chip/stm32/config-stm32f76x.h
+++ b/chip/stm32/config-stm32f76x.h
@@ -4,7 +4,7 @@
  */
 
 /* Memory mapping */
-#define CONFIG_FLASH_SIZE       (2048 * 1024)
+#define CONFIG_FLASH_SIZE_BYTES       (2048 * 1024)
 
 /* 3 regions type: 32K, 128K and 256K */
 #define SIZE_32KB (32 * 1024)
@@ -12,7 +12,7 @@
 #define SIZE_256KB (256 * 1024)
 #define CONFIG_FLASH_REGION_TYPE_COUNT 3
 #define CONFIG_FLASH_MULTIPLE_REGION \
-	(5 + (CONFIG_FLASH_SIZE - SIZE_256KB) / SIZE_256KB)
+	(5 + (CONFIG_FLASH_SIZE_BYTES - SIZE_256KB) / SIZE_256KB)
 
 /* Erasing 256K can take up to 2s, need to defer erase. */
 #define CONFIG_FLASH_DEFERRED_ERASE
@@ -44,7 +44,7 @@
 #define CONFIG_EC_PROTECTED_STORAGE_SIZE	CONFIG_RW_MEM_OFF
 #define CONFIG_EC_WRITABLE_STORAGE_OFF		CONFIG_RW_MEM_OFF
 #define CONFIG_EC_WRITABLE_STORAGE_SIZE					\
-		 (CONFIG_FLASH_SIZE - CONFIG_EC_WRITABLE_STORAGE_OFF)
+		 (CONFIG_FLASH_SIZE_BYTES - CONFIG_EC_WRITABLE_STORAGE_OFF)
 
 #define CONFIG_WP_STORAGE_OFF		CONFIG_EC_PROTECTED_STORAGE_OFF
 #define CONFIG_WP_STORAGE_SIZE		CONFIG_EC_PROTECTED_STORAGE_SIZE
diff --git a/chip/stm32/config-stm32g41xb.h b/chip/stm32/config-stm32g41xb.h
index ab8642b9e6..da42faf2c3 100644
--- a/chip/stm32/config-stm32g41xb.h
+++ b/chip/stm32/config-stm32g41xb.h
@@ -21,7 +21,7 @@
  * without being constrained by flash space issue. Currently only using RO image
  * flashed with STM32 debugger.
  */
-#define CONFIG_FLASH_SIZE       (256 * 1024)
+#define CONFIG_FLASH_SIZE_BYTES       (256 * 1024)
 #define CONFIG_FLASH_WRITE_SIZE 0x0004
 #define CONFIG_FLASH_BANK_SIZE (2 * 1024)
 #define CONFIG_FLASH_ERASE_SIZE CONFIG_FLASH_BANK_SIZE
diff --git a/chip/stm32/config-stm32h7x3.h b/chip/stm32/config-stm32h7x3.h
index 399e6a6f1a..da94b09069 100644
--- a/chip/stm32/config-stm32h7x3.h
+++ b/chip/stm32/config-stm32h7x3.h
@@ -4,7 +4,7 @@
  */
 
 /* Memory mapping */
-#define CONFIG_FLASH_SIZE       (2048 * 1024)
+#define CONFIG_FLASH_SIZE_BYTES       (2048 * 1024)
 #define CONFIG_FLASH_ERASE_SIZE (128 * 1024)  /* erase bank size */
 /* always use 256-bit writes due to ECC */
 #define CONFIG_FLASH_WRITE_SIZE          32   /* minimum write size */
@@ -32,7 +32,7 @@
 
 #define CONFIG_RO_MEM_OFF	0
 #define CONFIG_RO_SIZE		(128 * 1024)
-#define CONFIG_RW_MEM_OFF	(CONFIG_FLASH_SIZE / 2)
+#define CONFIG_RW_MEM_OFF	(CONFIG_FLASH_SIZE_BYTES / 2)
 #define CONFIG_RW_SIZE		(512 * 1024)
 
 #define CONFIG_RO_STORAGE_OFF	0
@@ -42,7 +42,7 @@
 #define CONFIG_EC_PROTECTED_STORAGE_SIZE	CONFIG_RW_MEM_OFF
 #define CONFIG_EC_WRITABLE_STORAGE_OFF		CONFIG_RW_MEM_OFF
 #define CONFIG_EC_WRITABLE_STORAGE_SIZE					\
-		 (CONFIG_FLASH_SIZE - CONFIG_EC_WRITABLE_STORAGE_OFF)
+		 (CONFIG_FLASH_SIZE_BYTES - CONFIG_EC_WRITABLE_STORAGE_OFF)
 
 #define CONFIG_WP_STORAGE_OFF		CONFIG_EC_PROTECTED_STORAGE_OFF
 #define CONFIG_WP_STORAGE_SIZE		CONFIG_EC_PROTECTED_STORAGE_SIZE
diff --git a/chip/stm32/config-stm32l100.h b/chip/stm32/config-stm32l100.h
index 579e31cb5b..2c4efcc6df 100644
--- a/chip/stm32/config-stm32l100.h
+++ b/chip/stm32/config-stm32l100.h
@@ -4,7 +4,7 @@
  */
 
 /* Memory mapping */
-#define CONFIG_FLASH_SIZE 0x00020000
+#define CONFIG_FLASH_SIZE_BYTES 0x00020000
 #define CONFIG_FLASH_BANK_SIZE  0x1000
 #define CONFIG_FLASH_ERASE_SIZE 0x0100  /* erase bank size */
 
diff --git a/chip/stm32/config-stm32l15x.h b/chip/stm32/config-stm32l15x.h
index afdc241e96..0b32f95572 100644
--- a/chip/stm32/config-stm32l15x.h
+++ b/chip/stm32/config-stm32l15x.h
@@ -4,7 +4,7 @@
  */
 
 /* Memory mapping */
-#define CONFIG_FLASH_SIZE 0x00020000
+#define CONFIG_FLASH_SIZE_BYTES 0x00020000
 #define CONFIG_FLASH_BANK_SIZE  0x1000
 #define CONFIG_FLASH_ERASE_SIZE 0x0100  /* erase bank size */
 
diff --git a/chip/stm32/config-stm32l442.h b/chip/stm32/config-stm32l442.h
index e9f3e04c53..54ba9bac8d 100644
--- a/chip/stm32/config-stm32l442.h
+++ b/chip/stm32/config-stm32l442.h
@@ -4,7 +4,7 @@
  */
 
 /* Memory mapping */
-#define CONFIG_FLASH_SIZE  0x00040000   /* 256 kB */
+#define CONFIG_FLASH_SIZE_BYTES  0x00040000   /* 256 kB */
 #define CONFIG_FLASH_BANK_SIZE  0x800   /* 2 kB */
 #define CONFIG_FLASH_ERASE_SIZE 0x800   /* 2 KB */
 #define CONFIG_FLASH_WRITE_SIZE 0x8     /* 64 bits */
diff --git a/chip/stm32/config-stm32l476.h b/chip/stm32/config-stm32l476.h
index 9f6b35b8b1..2e0084fd94 100644
--- a/chip/stm32/config-stm32l476.h
+++ b/chip/stm32/config-stm32l476.h
@@ -4,7 +4,7 @@
  */
 
 /* Memory mapping */
-#define CONFIG_FLASH_SIZE 0x00100000	/* 1 MB */
+#define CONFIG_FLASH_SIZE_BYTES 0x00100000	/* 1 MB */
 #define CONFIG_FLASH_BANK_SIZE  0x800	/* 2 kB */
 #define CONFIG_FLASH_ERASE_SIZE 0x800	/* 2 KB */
 #define CONFIG_FLASH_WRITE_SIZE 0x8	/* 64 bits (without 8 bits ECC) */
diff --git a/chip/stm32/flash-stm32f0.c b/chip/stm32/flash-stm32f0.c
index e2ff2c779c..a0aef5fe3f 100644
--- a/chip/stm32/flash-stm32f0.c
+++ b/chip/stm32/flash-stm32f0.c
@@ -26,7 +26,7 @@ uint32_t flash_physical_get_protect_flags(void)
 {
 	uint32_t flags = 0;
 	uint32_t wrp01 = REG32(STM32_OPTB_BASE + STM32_OPTB_WRP01);
-#if CONFIG_FLASH_SIZE > 64 * 1024
+#if CONFIG_FLASH_SIZE_BYTES > 64 * 1024
 	uint32_t wrp23 = REG32(STM32_OPTB_BASE + STM32_OPTB_WRP23);
 #endif
 
@@ -76,12 +76,12 @@ uint32_t flash_physical_get_protect_flags(void)
 
 		switch (i) {
 		case 8:
-#if CONFIG_FLASH_SIZE > 64 * 1024
+#if CONFIG_FLASH_SIZE_BYTES > 64 * 1024
 		case 24:
 #endif
 			shift += 8;
 			break;
-#if CONFIG_FLASH_SIZE > 64 * 1024
+#if CONFIG_FLASH_SIZE_BYTES > 64 * 1024
 		case 16:
 			reg = 1;
 			shift = 0;
@@ -96,7 +96,7 @@ uint32_t flash_physical_get_protect_flags(void)
 	for (i = 0; i < FLASH_REGION_COUNT; i++) {
 		if (!(wrp01 & wrp_mask[i][0]) &&
 			(wrp01 & wrp_mask[i][0] << 8) == (wrp_mask[i][0] << 8))
-#if CONFIG_FLASH_SIZE > 64 * 1024
+#if CONFIG_FLASH_SIZE_BYTES > 64 * 1024
 			if (!(wrp23 & wrp_mask[i][1]) &&
 			     (wrp23 & wrp_mask[i][1] << 8) ==
 							 (wrp_mask[i][1] << 8))
@@ -106,7 +106,7 @@ uint32_t flash_physical_get_protect_flags(void)
 #endif /* CONFIG_FLASH_PROTECT_RW || CONFIG_ROLLBACK */
 
 	if (wrp01 == 0xff00ff00)
-#if CONFIG_FLASH_SIZE > 64 * 1024
+#if CONFIG_FLASH_SIZE_BYTES > 64 * 1024
 		if (wrp23 == 0xff00ff00)
 #endif
 			flags |= EC_FLASH_PROTECT_ALL_AT_BOOT;
diff --git a/chip/stm32/flash-stm32f3.c b/chip/stm32/flash-stm32f3.c
index ea5ba1a1b6..bae4315b67 100644
--- a/chip/stm32/flash-stm32f3.c
+++ b/chip/stm32/flash-stm32f3.c
@@ -36,7 +36,7 @@ struct ec_flash_bank const flash_bank_array[] = {
 		.protect_size_exp = __fls(SIZE_128KB),
 	},
 	{
-		.count = (CONFIG_FLASH_SIZE - SIZE_256KB) / SIZE_256KB,
+		.count = (CONFIG_FLASH_SIZE_BYTES - SIZE_256KB) / SIZE_256KB,
 		.write_size_exp = __fls(CONFIG_FLASH_WRITE_SIZE),
 		.size_exp = __fls(SIZE_256KB),
 		.erase_size_exp = __fls(SIZE_256KB),
@@ -70,7 +70,7 @@ struct ec_flash_bank const flash_bank_array[] = {
 		.protect_size_exp = __fls(SIZE_64KB),
 	},
 	{
-		.count = (CONFIG_FLASH_SIZE - SIZE_128KB) / SIZE_128KB,
+		.count = (CONFIG_FLASH_SIZE_BYTES - SIZE_128KB) / SIZE_128KB,
 		.write_size_exp = __fls(CONFIG_FLASH_WRITE_SIZE),
 		.size_exp = __fls(SIZE_128KB),
 		.erase_size_exp = __fls(SIZE_128KB),
diff --git a/chip/stm32/flash-stm32g4-l4.c b/chip/stm32/flash-stm32g4-l4.c
index 27092a1156..360d63a739 100644
--- a/chip/stm32/flash-stm32g4-l4.c
+++ b/chip/stm32/flash-stm32g4-l4.c
@@ -46,7 +46,7 @@
  * CONFIG_WP_STORAGE_SIZE -> size of RO region in bytes
  */
 #define FLASH_PAGE_SIZE CONFIG_FLASH_BANK_SIZE
-#define FLASH_PAGE_MAX_COUNT (CONFIG_FLASH_SIZE / FLASH_PAGE_SIZE)
+#define FLASH_PAGE_MAX_COUNT (CONFIG_FLASH_SIZE_BYTES / FLASH_PAGE_SIZE)
 #define FLASH_RO_FIRST_PAGE_IDX WP_BANK_OFFSET
 #define FLASH_RO_LAST_PAGE_IDX ((CONFIG_WP_STORAGE_SIZE / FLASH_PAGE_SIZE) \
 				 + FLASH_RO_FIRST_PAGE_IDX - 1)
diff --git a/chip/stm32/flash-stm32h7.c b/chip/stm32/flash-stm32h7.c
index a541b962d2..2797720b8f 100644
--- a/chip/stm32/flash-stm32h7.c
+++ b/chip/stm32/flash-stm32h7.c
@@ -44,7 +44,7 @@
  * not what is called 'bank' in the common code (ie Write-Protect sectors)
  * both have the same number of 128KB blocks.
  */
-#define HWBANK_SIZE  (CONFIG_FLASH_SIZE / 2)
+#define HWBANK_SIZE  (CONFIG_FLASH_SIZE_BYTES / 2)
 #define BLOCKS_PER_HWBANK (HWBANK_SIZE / CONFIG_FLASH_ERASE_SIZE)
 #define BLOCKS_HWBANK_MASK (BIT(BLOCKS_PER_HWBANK) - 1)