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authorVic (Chun-Ju) Yang <victoryang@chromium.org>2014-04-18 12:02:43 +0800
committerchrome-internal-fetch <chrome-internal-fetch@google.com>2014-04-24 11:36:49 +0000
commit632d00509049884918abfc7fc275472592da2c2c (patch)
treef3085530dc5acb3063e947656238895fec004c28 /chip/stm32
parentd02e8c2090f7cd57098016d520b538e61870beb5 (diff)
downloadchrome-ec-632d00509049884918abfc7fc275472592da2c2c.tar.gz
Keyborg: chip-to-chip SPI communication
This implements a simple SPI driver for the two chips to exchange packets. There are both sync interface and async interface. Sync interface is easier to use, and async interface frees the CPU while the DMA takes care of the communication. BUG=None TEST=Hello test passed BRANCH=None Change-Id: I9823bad5cae6d1fa8f3658d17af4b998d3735a3e Signed-off-by: Vic (Chun-Ju) Yang <victoryang@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/195533 Reviewed-by: Vincent Palatin <vpalatin@chromium.org>
Diffstat (limited to 'chip/stm32')
-rw-r--r--chip/stm32/registers.h6
1 files changed, 6 insertions, 0 deletions
diff --git a/chip/stm32/registers.h b/chip/stm32/registers.h
index dd4ceb13d6..0752416a2f 100644
--- a/chip/stm32/registers.h
+++ b/chip/stm32/registers.h
@@ -678,6 +678,7 @@ typedef volatile struct stm32_spi_regs stm32_spi_regs_t;
#define STM32_SPI_CR1_BIDIMODE (1 << 15)
#define STM32_SPI_CR1_BIDIOE (1 << 14)
+#define STM32_SPI_CR1_CRCEN (1 << 13)
#define STM32_SPI_CR1_SSM (1 << 9)
#define STM32_SPI_CR1_SSI (1 << 8)
#define STM32_SPI_CR1_LSBFIRST (1 << 7)
@@ -691,6 +692,11 @@ typedef volatile struct stm32_spi_regs stm32_spi_regs_t;
#define STM32_SPI_CR2_TXDMAEN (1 << 1)
#define STM32_SPI_CR2_DATASIZE(n) (((n) - 1) << 8)
+#define STM32_SPI_SR_RXNE (1 << 0)
+#define STM32_SPI_SR_TXE (1 << 1)
+#define STM32_SPI_SR_CRCERR (1 << 4)
+#define STM32_SPI_SR_BSY (1 << 7)
+
/* --- Debug --- */
#ifdef CHIP_FAMILY_STM32F0