diff options
| author | Sam Hurst <shurst@google.com> | 2018-09-13 09:27:08 -0700 |
|---|---|---|
| committer | chrome-bot <chrome-bot@chromium.org> | 2019-04-08 22:30:19 -0700 |
| commit | 0fe6147a9d8d9feef5049aa6c6c4a6ad30d12b26 (patch) | |
| tree | 05d4509bcfe68a248ec3fa58168f3de2536c2d9c /chip/stm32 | |
| parent | e097feb8b2db20cd2435a483517356defa222db1 (diff) | |
| download | chrome-ec-0fe6147a9d8d9feef5049aa6c6c4a6ad30d12b26.tar.gz | |
chocodile_vpdmcu: Firmware for chocodile mcu
Implement Chocodile Charge-Through Vconn Powered firmware for mcu
using new Type-C/PD State machine stack.
BUG=b:115626873
BRANCH=none
TEST=manual
Charge-Through was tested on an Atlas running a DRP USB-C/PD state
machine with CTUnattached.SNK and CTAttached.SNK states.
Signed-off-by: Sam Hurst <shurst@chromium.org>
Change-Id: I847f1bcd2fc3ce41e66edd133a10c943d5e8c819
Reviewed-on: https://chromium-review.googlesource.com/1225250
Commit-Ready: ChromeOS CL Exonerator Bot <chromiumos-cl-exonerator@appspot.gserviceaccount.com>
Tested-by: Sam Hurst <shurst@google.com>
Reviewed-by: Stefan Reinauer <reinauer@google.com>
Diffstat (limited to 'chip/stm32')
| -rw-r--r-- | chip/stm32/adc-stm32f0.c | 8 | ||||
| -rw-r--r-- | chip/stm32/usb_pd_phy.c | 11 |
2 files changed, 19 insertions, 0 deletions
diff --git a/chip/stm32/adc-stm32f0.c b/chip/stm32/adc-stm32f0.c index c448b4b42f..add5c0c30c 100644 --- a/chip/stm32/adc-stm32f0.c +++ b/chip/stm32/adc-stm32f0.c @@ -40,7 +40,11 @@ static const struct adc_profile_t profile = { /* Sample all channels once using DMA */ .cfgr1_reg = STM32_ADC_CFGR1_OVRMOD, .cfgr2_reg = 0, +#ifdef CONFIG_ADC_SAMPLE_TIME + .smpr_reg = CONFIG_ADC_SAMPLE_TIME, +#else .smpr_reg = STM32_ADC_SMPR_13_5_CY, +#endif .ier_reg = 0, .dma_option = &dma_single, .dma_buffer_size = 1, @@ -60,7 +64,11 @@ static const struct adc_profile_t profile = { STM32_ADC_CFGR1_CONT | STM32_ADC_CFGR1_DMACFG, .cfgr2_reg = 0, +#ifdef CONFIG_ADC_SAMPLE_TIME + .smpr_reg = CONFIG_ADC_SAMPLE_TIME, +#else .smpr_reg = STM32_ADC_SMPR_1_5_CY, +#endif /* Fire interrupt at end of sequence. */ .ier_reg = STM32_ADC_IER_EOSEQIE, .dma_option = &dma_continuous, diff --git a/chip/stm32/usb_pd_phy.c b/chip/stm32/usb_pd_phy.c index 92656a1582..0efa947423 100644 --- a/chip/stm32/usb_pd_phy.c +++ b/chip/stm32/usb_pd_phy.c @@ -452,6 +452,16 @@ void pd_rx_handler(void) int next_idx; pending = STM32_EXTI_PR; +#ifdef CONFIG_USB_TYPEC_CTVPD + /* Charge-Through Side detach event */ + if (pending & EXTI_COMP2_MASK) { + task_set_event(PD_PORT_TO_TASK_ID(0), PD_EVENT_SM, 0); + /* Clear interrupt */ + STM32_EXTI_PR = EXTI_COMP2_MASK; + pending &= ~EXTI_COMP2_MASK; + } +#endif + for (i = 0; i < CONFIG_USB_PD_PORT_COUNT; i++) { if (pending & EXTI_COMP_MASK(i)) { rx_edge_ts[i][rx_edge_ts_idx[i]].val = get_time().val; @@ -648,6 +658,7 @@ void pd_hw_init(int port, int role) phy->tim_tx->ccmr1 = val; else phy->tim_tx->ccmr2 = val; + phy->tim_tx->ccer = 1 << ((TIM_TX_CCR_IDX(port) - 1) * 4); phy->tim_tx->bdtr = 0x8000; /* set prescaler to /1 */ |