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authorCaveh Jalali <caveh@chromium.org>2021-07-28 20:55:08 -0700
committerCommit Bot <commit-bot@chromium.org>2021-08-01 00:17:50 +0000
commit2a5ce905c11807a19035f7a072489df04be4db97 (patch)
tree9e4705d09673e7bf2bb22c78191a9520913976e5 /chip
parent5c5053cfa89b1c490ccf093ee813765ea78486ab (diff)
downloadchrome-ec-2a5ce905c11807a19035f7a072489df04be4db97.tar.gz
COIL: npcx: Update SHI terminology
BRANCH=none BUG=b:181607131 TEST=compare_build.sh matches Change-Id: I045ae5f148fe6233abf921d99f381b2cce6966ad Signed-off-by: Caveh Jalali <caveh@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3060260 Reviewed-by: CH Lin <chlin56@nuvoton.com> Reviewed-by: Daisuke Nojiri <dnojiri@chromium.org>
Diffstat (limited to 'chip')
-rw-r--r--chip/npcx/shi.c10
1 files changed, 5 insertions, 5 deletions
diff --git a/chip/npcx/shi.c b/chip/npcx/shi.c
index 0d62f92c03..503a52807e 100644
--- a/chip/npcx/shi.c
+++ b/chip/npcx/shi.c
@@ -70,11 +70,11 @@
/*
* Timeout to wait for SHI request packet
*
- * This affects the slowest SPI clock we can support. A delay of 8192 us
- * permits a 512-byte request at 500 KHz, assuming the master starts sending
- * bytes as soon as it asserts chip select. That's as slow as we would
- * practically want to run the SHI interface, since running it slower
- * significantly impacts firmware update times.
+ * This affects the slowest SPI clock we can support. A delay of 8192
+ * us permits a 512-byte request at 500 KHz, assuming the controller
+ * starts sending bytes as soon as it asserts chip select. That's as
+ * slow as we would practically want to run the SHI interface, since
+ * running it slower significantly impacts firmware update times.
*/
#define SHI_CMD_RX_TIMEOUT_US 8192