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authorJeremy Bettis <jbettis@google.com>2022-07-14 14:19:14 -0600
committerChromeos LUCI <chromeos-scoped@luci-project-accounts.iam.gserviceaccount.com>2022-07-26 19:43:40 +0000
commitf37d95b3edc6ff7bbda96fe7a4147273db66c306 (patch)
treeaaf408cfa525efce460cddb4153101b1db492109 /chip
parent160af3cb3634f645ef0ca1a3c312c68cc3316869 (diff)
downloadchrome-ec-f37d95b3edc6ff7bbda96fe7a4147273db66c306.tar.gz
ec: Switch black to 80 cols and reformat files
Add pyproject.toml config file to set black to 80 columns. Remove column length overrides from other config files. Reformat python files to 80 cols. BRANCH=None BUG=b:238434058 TEST=presubmit/CQ Signed-off-by: Jeremy Bettis <jbettis@google.com> Change-Id: I870a68f1bb751f4bad97024045f6e3075489e80f Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3764071 Commit-Queue: Jeremy Bettis <jbettis@chromium.org> Auto-Submit: Jeremy Bettis <jbettis@chromium.org> Tested-by: Jeremy Bettis <jbettis@chromium.org> Reviewed-by: Jack Rosenthal <jrosenth@chromium.org>
Diffstat (limited to 'chip')
-rwxr-xr-xchip/ish/util/pack_ec.py10
-rwxr-xr-xchip/mchp/util/pack_ec.py45
-rwxr-xr-xchip/mchp/util/pack_ec_mec152x.py55
-rwxr-xr-xchip/mchp/util/pack_ec_mec172x.py67
-rwxr-xr-xchip/mec1322/util/pack_ec.py11
5 files changed, 151 insertions, 37 deletions
diff --git a/chip/ish/util/pack_ec.py b/chip/ish/util/pack_ec.py
index e7bb0ce74b..3f55d61a1e 100755
--- a/chip/ish/util/pack_ec.py
+++ b/chip/ish/util/pack_ec.py
@@ -79,7 +79,9 @@ def main():
print(" kernel binary size:", args.kernel_size)
kern_rdup_pg_size = roundup_page(args.kernel_size)
# Add manifest for main ISH binary
- f.write(gen_manifest(b"ISHM", b"ISH_KERN", HEADER_SIZE, kern_rdup_pg_size))
+ f.write(
+ gen_manifest(b"ISHM", b"ISH_KERN", HEADER_SIZE, kern_rdup_pg_size)
+ )
if args.aon is not None:
print(" AON binary size: ", args.aon_size)
@@ -89,7 +91,11 @@ def main():
gen_manifest(
b"ISHM",
b"AON_TASK",
- (HEADER_SIZE + kern_rdup_pg_size * PAGE_SIZE - MANIFEST_ENTRY_SIZE),
+ (
+ HEADER_SIZE
+ + kern_rdup_pg_size * PAGE_SIZE
+ - MANIFEST_ENTRY_SIZE
+ ),
aon_rdup_pg_size,
)
)
diff --git a/chip/mchp/util/pack_ec.py b/chip/mchp/util/pack_ec.py
index 85aad94bd6..b015db377a 100755
--- a/chip/mchp/util/pack_ec.py
+++ b/chip/mchp/util/pack_ec.py
@@ -244,7 +244,11 @@ def BuildTag(args):
def BuildTagFromHdrAddr(header_loc):
tag = bytearray(
- [(header_loc >> 8) & 0xFF, (header_loc >> 16) & 0xFF, (header_loc >> 24) & 0xFF]
+ [
+ (header_loc >> 8) & 0xFF,
+ (header_loc >> 16) & 0xFF,
+ (header_loc >> 24) & 0xFF,
+ ]
)
tag.append(Crc8(0, tag))
return tag
@@ -327,7 +331,11 @@ def parseargs():
"--loader_file", help="EC loader binary", default="ecloader.bin"
)
parser.add_argument(
- "-s", "--spi_size", type=int, help="Size of the SPI flash in KB", default=512
+ "-s",
+ "--spi_size",
+ type=int,
+ help="Size of the SPI flash in KB",
+ default=512,
)
parser.add_argument(
"-l",
@@ -381,7 +389,10 @@ def parseargs():
default=False,
)
parser.add_argument(
- "--verbose", action="store_true", help="Enable verbose output", default=False
+ "--verbose",
+ action="store_true",
+ help="Enable verbose output",
+ default=False,
)
return parser.parse_args()
@@ -535,7 +546,9 @@ def main():
if args.test_spi == True:
crc = zlib.crc32(bytes(payload_rw[: (payload_rw_len - 32)]))
crc_ofs = payload_rw_len - 4
- debug_print("EC_RW CRC32 = 0x{0:08x} at offset 0x{1:08x}".format(crc, crc_ofs))
+ debug_print(
+ "EC_RW CRC32 = 0x{0:08x} at offset 0x{1:08x}".format(crc, crc_ofs)
+ )
for i in range(4):
payload_rw[crc_ofs + i] = crc & 0xFF
crc = crc >> 8
@@ -551,7 +564,11 @@ def main():
spi_list.append((args.header_loc, header, "header(lwf + ro)"))
spi_list.append(
- (args.header_loc + HEADER_SIZE, header_signature, "header(lwf + ro) signature")
+ (
+ args.header_loc + HEADER_SIZE,
+ header_signature,
+ "header(lwf + ro) signature",
+ )
)
spi_list.append(
(args.header_loc + args.payload_offset, payload, "payload(lfw + ro)")
@@ -593,12 +610,20 @@ def main():
for s in spi_list:
if addr < s[0]:
debug_print(
- "Offset ", hex(addr), " Length", hex(s[0] - addr), "fill with 0xff"
+ "Offset ",
+ hex(addr),
+ " Length",
+ hex(s[0] - addr),
+ "fill with 0xff",
)
f.write(b"\xff" * (s[0] - addr))
addr = s[0]
debug_print(
- "Offset ", hex(addr), " Length", hex(len(s[1])), "write data"
+ "Offset ",
+ hex(addr),
+ " Length",
+ hex(len(s[1])),
+ "write data",
)
f.write(s[1])
@@ -606,7 +631,11 @@ def main():
if addr < spi_size:
debug_print(
- "Offset ", hex(addr), " Length", hex(spi_size - addr), "fill with 0xff"
+ "Offset ",
+ hex(addr),
+ " Length",
+ hex(spi_size - addr),
+ "fill with 0xff",
)
f.write(b"\xff" * (spi_size - addr))
diff --git a/chip/mchp/util/pack_ec_mec152x.py b/chip/mchp/util/pack_ec_mec152x.py
index 8ef7b3992c..1d7df5e9b6 100755
--- a/chip/mchp/util/pack_ec_mec152x.py
+++ b/chip/mchp/util/pack_ec_mec152x.py
@@ -123,7 +123,9 @@ def GetPayloadFromOffset(payload_file, offset, padsize):
if rem_len:
payload += PAYLOAD_PAD_BYTE * (padsize - rem_len)
- debug_print("GetPayload: Added {0} padding bytes".format(padsize - rem_len))
+ debug_print(
+ "GetPayload: Added {0} padding bytes".format(padsize - rem_len)
+ )
return payload
@@ -312,7 +314,9 @@ def BuildHeader2(args, chip_dict, payload_len, load_addr, payload_entry):
payload_units = int(payload_len // chip_dict["PAYLOAD_GRANULARITY"])
assert payload_units < 0x10000, print(
- "Payload too large: len={0} units={1}".format(payload_len, payload_units)
+ "Payload too large: len={0} units={1}".format(
+ payload_len, payload_units
+ )
)
header[0x10:0x12] = payload_units.to_bytes(2, "little")
@@ -414,7 +418,11 @@ def BuildTag(args):
def BuildTagFromHdrAddr(header_loc):
tag = bytearray(
- [(header_loc >> 8) & 0xFF, (header_loc >> 16) & 0xFF, (header_loc >> 24) & 0xFF]
+ [
+ (header_loc >> 8) & 0xFF,
+ (header_loc >> 16) & 0xFF,
+ (header_loc >> 24) & 0xFF,
+ ]
)
tag.append(Crc8(0, tag))
return tag
@@ -516,7 +524,11 @@ def parseargs():
"--loader_file", help="EC loader binary", default="ecloader.bin"
)
parser.add_argument(
- "-s", "--spi_size", type=int, help="Size of the SPI flash in KB", default=512
+ "-s",
+ "--spi_size",
+ type=int,
+ help="Size of the SPI flash in KB",
+ default=512,
)
parser.add_argument(
"-l",
@@ -563,7 +575,10 @@ def parseargs():
default=False,
)
parser.add_argument(
- "--verbose", action="store_true", help="Enable verbose output", default=False
+ "--verbose",
+ action="store_true",
+ help="Enable verbose output",
+ default=False,
)
parser.add_argument(
"--tag0_loc", type=int, help="MEC152X TAG0 SPI offset", default=0
@@ -761,7 +776,9 @@ def main():
# is filled with the hash digest of the respective entity.
# BuildHeader2 computes the hash digest and stores it in the correct
# header location.
- header = BuildHeader2(args, chip_dict, lfw_ecro_len, LOAD_ADDR, lfw_ecro_entry)
+ header = BuildHeader2(
+ args, chip_dict, lfw_ecro_len, LOAD_ADDR, lfw_ecro_entry
+ )
printByteArrayAsHex(header, "Header(lfw_ecro)")
ec_info_block = GenEcInfoBlock(args, chip_dict)
@@ -770,7 +787,9 @@ def main():
cosignature = GenCoSignature(args, chip_dict, lfw_ecro)
printByteArrayAsHex(cosignature, "LFW + EC_RO cosignature")
- trailer = GenTrailer(args, chip_dict, lfw_ecro, None, ec_info_block, cosignature)
+ trailer = GenTrailer(
+ args, chip_dict, lfw_ecro, None, ec_info_block, cosignature
+ )
printByteArrayAsHex(trailer, "LFW + EC_RO trailer")
@@ -782,7 +801,9 @@ def main():
debug_print("args.input = ", args.input)
debug_print("args.image_size = ", hex(args.image_size))
- ecrw = GetPayloadFromOffset(args.input, args.image_size, chip_dict["PAD_SIZE"])
+ ecrw = GetPayloadFromOffset(
+ args.input, args.image_size, chip_dict["PAD_SIZE"]
+ )
debug_print("type(ecrw) is ", type(ecrw))
debug_print("len(ecrw) is ", hex(len(ecrw)))
@@ -883,12 +904,20 @@ def main():
for s in spi_list:
if addr < s[0]:
debug_print(
- "Offset ", hex(addr), " Length", hex(s[0] - addr), "fill with 0xff"
+ "Offset ",
+ hex(addr),
+ " Length",
+ hex(s[0] - addr),
+ "fill with 0xff",
)
f.write(b"\xff" * (s[0] - addr))
addr = s[0]
debug_print(
- "Offset ", hex(addr), " Length", hex(len(s[1])), "write data"
+ "Offset ",
+ hex(addr),
+ " Length",
+ hex(len(s[1])),
+ "write data",
)
f.write(s[1])
@@ -896,7 +925,11 @@ def main():
if addr < spi_size:
debug_print(
- "Offset ", hex(addr), " Length", hex(spi_size - addr), "fill with 0xff"
+ "Offset ",
+ hex(addr),
+ " Length",
+ hex(spi_size - addr),
+ "fill with 0xff",
)
f.write(b"\xff" * (spi_size - addr))
diff --git a/chip/mchp/util/pack_ec_mec172x.py b/chip/mchp/util/pack_ec_mec172x.py
index 25a4cb7ed1..ee14bdb2dc 100755
--- a/chip/mchp/util/pack_ec_mec172x.py
+++ b/chip/mchp/util/pack_ec_mec172x.py
@@ -132,7 +132,9 @@ def GetPayloadFromOffset(payload_file, offset, chip_dict):
if rem_len:
payload += chip_dict["PAYLOAD_PAD_BYTE"] * (padsize - rem_len)
- debug_print("GetPayload: Added {0} padding bytes".format(padsize - rem_len))
+ debug_print(
+ "GetPayload: Added {0} padding bytes".format(padsize - rem_len)
+ )
return payload
@@ -335,12 +337,16 @@ def BuildHeader2(args, chip_dict, payload_len, load_addr, payload_entry):
# bytes 0x10 - 0x11 payload length in units of 128 bytes
assert payload_len % chip_dict["PAYLOAD_GRANULARITY"] == 0, print(
- "Payload size not a multiple of {0}".format(chip_dict["PAYLOAD_GRANULARITY"])
+ "Payload size not a multiple of {0}".format(
+ chip_dict["PAYLOAD_GRANULARITY"]
+ )
)
payload_units = int(payload_len // chip_dict["PAYLOAD_GRANULARITY"])
assert payload_units < 0x10000, print(
- "Payload too large: len={0} units={1}".format(payload_len, payload_units)
+ "Payload too large: len={0} units={1}".format(
+ payload_len, payload_units
+ )
)
header[0x10:0x12] = payload_units.to_bytes(2, "little")
@@ -438,7 +444,9 @@ def GenTrailer(
debug_print(" Update: payload len=0x{0:0x}".format(len(payload)))
if ec_info_block != None:
hasher.update(ec_info_block)
- debug_print(" Update: ec_info_block len=0x{0:0x}".format(len(ec_info_block)))
+ debug_print(
+ " Update: ec_info_block len=0x{0:0x}".format(len(ec_info_block))
+ )
if encryption_key_header != None:
hasher.update(encryption_key_header)
debug_print(
@@ -448,7 +456,9 @@ def GenTrailer(
)
if cosignature != None:
hasher.update(cosignature)
- debug_print(" Update: cosignature len=0x{0:0x}".format(len(cosignature)))
+ debug_print(
+ " Update: cosignature len=0x{0:0x}".format(len(cosignature))
+ )
trailer[0:48] = hasher.digest()
trailer[-16:] = 16 * b"\xff"
@@ -478,7 +488,11 @@ def BuildTag(args):
def BuildTagFromHdrAddr(header_loc):
tag = bytearray(
- [(header_loc >> 8) & 0xFF, (header_loc >> 16) & 0xFF, (header_loc >> 24) & 0xFF]
+ [
+ (header_loc >> 8) & 0xFF,
+ (header_loc >> 16) & 0xFF,
+ (header_loc >> 24) & 0xFF,
+ ]
)
tag.append(Crc8(0, tag))
return tag
@@ -585,7 +599,11 @@ def parseargs():
"--load_addr", type=int, help="EC SRAM load address", default=0xC0000
)
parser.add_argument(
- "-s", "--spi_size", type=int, help="Size of the SPI flash in KB", default=512
+ "-s",
+ "--spi_size",
+ type=int,
+ help="Size of the SPI flash in KB",
+ default=512,
)
parser.add_argument(
"-l",
@@ -641,7 +659,10 @@ def parseargs():
default=False,
)
parser.add_argument(
- "--verbose", action="store_true", help="Enable verbose output", default=False
+ "--verbose",
+ action="store_true",
+ help="Enable verbose output",
+ default=False,
)
parser.add_argument(
"--tag0_loc", type=int, help="MEC172x TAG0 SPI offset", default=0
@@ -805,14 +826,18 @@ def main():
# 32-bit word at offset 0x4 address of reset handler
# NOTE: reset address will have bit[0]=1 to ensure thumb mode.
lfw_ecro_entry = GetEntryPoint(rorofile)
- debug_print("LFW Entry point from GetEntryPoint = 0x{0:08x}".format(lfw_ecro_entry))
+ debug_print(
+ "LFW Entry point from GetEntryPoint = 0x{0:08x}".format(lfw_ecro_entry)
+ )
# Chromebooks are not using MEC BootROM SPI header/payload authentication
# or payload encryption. In this case the header authentication signature
# is filled with the hash digest of the respective entity.
# BuildHeader2 computes the hash digest and stores it in the correct
# header location.
- header = BuildHeader2(args, chip_dict, lfw_ecro_len, args.load_addr, lfw_ecro_entry)
+ header = BuildHeader2(
+ args, chip_dict, lfw_ecro_len, args.load_addr, lfw_ecro_entry
+ )
printByteArrayAsHex(header, "Header(lfw_ecro)")
ec_info_block = GenEcInfoBlock(args, chip_dict)
@@ -821,7 +846,9 @@ def main():
cosignature = GenCoSignature(args, chip_dict, lfw_ecro)
printByteArrayAsHex(cosignature, "LFW + EC_RO cosignature")
- trailer = GenTrailer(args, chip_dict, lfw_ecro, None, ec_info_block, cosignature)
+ trailer = GenTrailer(
+ args, chip_dict, lfw_ecro, None, ec_info_block, cosignature
+ )
printByteArrayAsHex(trailer, "LFW + EC_RO trailer")
@@ -937,12 +964,20 @@ def main():
for s in spi_list:
if addr < s[0]:
debug_print(
- "Offset ", hex(addr), " Length", hex(s[0] - addr), "fill with 0xff"
+ "Offset ",
+ hex(addr),
+ " Length",
+ hex(s[0] - addr),
+ "fill with 0xff",
)
f.write(b"\xff" * (s[0] - addr))
addr = s[0]
debug_print(
- "Offset ", hex(addr), " Length", hex(len(s[1])), "write data"
+ "Offset ",
+ hex(addr),
+ " Length",
+ hex(len(s[1])),
+ "write data",
)
f.write(s[1])
@@ -950,7 +985,11 @@ def main():
if addr < spi_size:
debug_print(
- "Offset ", hex(addr), " Length", hex(spi_size - addr), "fill with 0xff"
+ "Offset ",
+ hex(addr),
+ " Length",
+ hex(spi_size - addr),
+ "fill with 0xff",
)
f.write(b"\xff" * (spi_size - addr))
diff --git a/chip/mec1322/util/pack_ec.py b/chip/mec1322/util/pack_ec.py
index 44ba6e7854..6898548feb 100755
--- a/chip/mec1322/util/pack_ec.py
+++ b/chip/mec1322/util/pack_ec.py
@@ -231,7 +231,11 @@ def parseargs():
"--loader_file", help="EC loader binary", default="ecloader.bin"
)
parser.add_argument(
- "-s", "--spi_size", type=int, help="Size of the SPI flash in MB", default=4
+ "-s",
+ "--spi_size",
+ type=int,
+ help="Size of the SPI flash in MB",
+ default=4,
)
parser.add_argument(
"-l",
@@ -281,7 +285,10 @@ def parseargs():
default=0xB,
)
parser.add_argument(
- "--image_size", type=int, help="Size of a single image.", default=(96 * 1024)
+ "--image_size",
+ type=int,
+ help="Size of a single image.",
+ default=(96 * 1024),
)
return parser.parse_args()