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| author | Rajesh Kumar <rajesh3.kumar@intel.com> | 2022-12-05 11:01:24 -0800 |
|---|---|---|
| committer | Chromeos LUCI <chromeos-scoped@luci-project-accounts.iam.gserviceaccount.com> | 2022-12-07 20:06:04 +0000 |
| commit | 3a824dc622e29c423e39b1ec3c1b2bac571f23ce (patch) | |
| tree | 5e5fdf25fff48de8d05eeb7b567cf02b42416bc0 /chip | |
| parent | 2fc6c41fccc215b5b91423b6de3361d0dcfa2620 (diff) | |
| download | chrome-ec-3a824dc622e29c423e39b1ec3c1b2bac571f23ce.tar.gz | |
ec: Support logging system boot time info
This CL add support logging system boot time and hostcommand to get
boot time info.
EC logs elapsed time (in micro second) info since boot for different
signal events,that can be used to calculate system boot time in cold
boot and warm boot scenarios.
Below are the events when EC logs time info
ARAIL EC turns on A-RAIL
RSMRST EC releases RSMRST#
ESPIRST ESPIRST received
PLTRST_LOW PLTRST# asserted
PLTRST_HIGH PLTRST# deasserted
EC_CUR_TIME EC current time
cnt increments on every warm reboot and reset to 0 on
cold reboot
BUG=b:249163956
BRANCH=none
TEST='ectool boottime' AP console command is used to fetch data
'reboot' on AP console to trigger warm reboot
'apshutdown' on EC console to trigger cold reboot
Signed-off-by: Rajesh Kumar <rajesh3.kumar@intel.com>
Change-Id: I47abe3f8a0b7ab43f2af11bf8387c006ba383020
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/4081566
Code-Coverage: Zoss <zoss-cl-coverage@prod.google.com>
Tested-by: Li-Yu Yu <aaronyu@google.com>
Reviewed-by: Boris Mittelberg <bmbm@google.com>
Diffstat (limited to 'chip')
| -rw-r--r-- | chip/it83xx/espi.c | 4 | ||||
| -rw-r--r-- | chip/mchp/espi.c | 9 | ||||
| -rw-r--r-- | chip/npcx/espi.c | 6 |
3 files changed, 17 insertions, 2 deletions
diff --git a/chip/it83xx/espi.c b/chip/it83xx/espi.c index bf52b87404..f59f3728bf 100644 --- a/chip/it83xx/espi.c +++ b/chip/it83xx/espi.c @@ -13,6 +13,7 @@ #include "power.h" #include "registers.h" #include "system.h" +#include "system_boot_time.h" #include "task.h" #include "uart.h" #include "util.h" @@ -273,6 +274,7 @@ static void espi_vw_idx7_isr(uint8_t flag_changed, uint8_t vw_evt) static void espi_chipset_reset(void) { hook_notify(HOOK_CHIPSET_RESET); + update_ap_boot_time(ESPIRST); } DECLARE_DEFERRED(espi_chipset_reset); #endif @@ -284,12 +286,14 @@ static void espi_vw_idx3_isr(uint8_t flag_changed, uint8_t vw_evt) if (pltrst) { espi_vw_host_startup(); + update_ap_boot_time(PLTRST_HIGH); } else { #ifdef CONFIG_CHIPSET_RESET_HOOK hook_call_deferred(&espi_chipset_reset_data, MSEC); #endif /* Store port 80 reset event */ port_80_write(PORT_80_EVENT_RESET); + update_ap_boot_time(PLTRST_LOW); } CPRINTS("VW PLTRST_L %sasserted", pltrst ? "de" : ""); diff --git a/chip/mchp/espi.c b/chip/mchp/espi.c index 53d17e90b2..dce81448d7 100644 --- a/chip/mchp/espi.c +++ b/chip/mchp/espi.c @@ -20,6 +20,7 @@ #include "power.h" #include "registers.h" #include "system.h" +#include "system_boot_time.h" #include "task.h" #include "tfdp_chip.h" #include "timer.h" @@ -833,6 +834,7 @@ int espi_vw_disable_wire_int(enum espi_vw_signal signal) static void espi_chipset_reset(void) { hook_notify(HOOK_CHIPSET_RESET); + update_ap_boot_time(ESPIRST); } DECLARE_DEFERRED(espi_chipset_reset); #endif @@ -867,12 +869,15 @@ void espi_vw_evt_pltrst_n(uint32_t wire_state, uint32_t bpos) { CPRINTS("VW PLTRST#: %d", wire_state); - if (wire_state) /* Platform Reset de-assertion */ + if (wire_state) { /* Platform Reset de-assertion */ espi_host_init(); - else /* assertion */ + update_ap_boot_time(PLTRST_HIGH); + } else { /* assertion */ #ifdef CONFIG_CHIPSET_RESET_HOOK hook_call_deferred(&espi_chipset_reset_data, MSEC); #endif + update_ap_boot_time(PLTRST_LOW); + } } /* OOB Reset Warn event handler */ diff --git a/chip/npcx/espi.c b/chip/npcx/espi.c index e73d04e988..3bed4f4564 100644 --- a/chip/npcx/espi.c +++ b/chip/npcx/espi.c @@ -13,6 +13,7 @@ #include "power.h" #include "registers.h" #include "system.h" +#include "system_boot_time.h" #include "task.h" #include "timer.h" #include "uart.h" @@ -459,11 +460,14 @@ void espi_vw_evt_pltrst(void) /* Enable eSPI peripheral channel */ SET_BIT(NPCX_ESPICFG, NPCX_ESPICFG_PCHANEN); #endif + update_ap_boot_time(PLTRST_HIGH); + } else { /* PLTRST# asserted */ #ifdef CONFIG_CHIPSET_RESET_HOOK hook_call_deferred(&espi_chipset_reset_data, MSEC); #endif + update_ap_boot_time(PLTRST_LOW); } } @@ -524,6 +528,8 @@ void espi_espirst_handler(void) /* Clear pending bit of WUI */ SET_BIT(NPCX_WKPCL(MIWU_TABLE_0, MIWU_GROUP_5), 5); + update_ap_boot_time(ESPIRST); + CPRINTS("eSPI RST issued!"); } |