diff options
author | Caveh Jalali <caveh@chromium.org> | 2021-07-29 15:59:10 -0700 |
---|---|---|
committer | Commit Bot <commit-bot@chromium.org> | 2021-08-02 18:23:50 +0000 |
commit | 640ed887a0eff557ca2bafed115f2813042cf90e (patch) | |
tree | d83b08f2c41ffd0522fe8831a0aa9b6bb24a8655 /chip | |
parent | 9193fc043f70b7fa657e30605ec18b1f548b2ac8 (diff) | |
download | chrome-ec-640ed887a0eff557ca2bafed115f2813042cf90e.tar.gz |
COIL: chip/it83xx: Update SPI terminology
BRANCH=none
BUG=b:181607131
TEST=compare_build.sh matches
Change-Id: I6f5ac12ff64fe870709dc91bca71e0901bed3420
Signed-off-by: Caveh Jalali <caveh@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3061911
Commit-Queue: Harry Cutts <hcutts@chromium.org>
Reviewed-by: Harry Cutts <hcutts@chromium.org>
Diffstat (limited to 'chip')
-rw-r--r-- | chip/it83xx/espi.c | 48 | ||||
-rw-r--r-- | chip/it83xx/lpc.c | 2 | ||||
-rw-r--r-- | chip/it83xx/spi.c | 28 |
3 files changed, 39 insertions, 39 deletions
diff --git a/chip/it83xx/espi.c b/chip/it83xx/espi.c index d5ec41cab7..4f68fae81b 100644 --- a/chip/it83xx/espi.c +++ b/chip/it83xx/espi.c @@ -25,7 +25,7 @@ struct vw_channel_t { uint8_t valid_mask; /* valid bit of signal */ }; -/* VW settings after the master enables the VW channel. */ +/* VW settings after the controller enables the VW channel. */ static const struct vw_channel_t en_vw_setting[] = { /* EC sends SUS_ACK# = 1 VW to PCH. That does not apply to GLK SoC. */ #ifndef CONFIG_CHIPSET_GEMINILAKE @@ -35,14 +35,14 @@ static const struct vw_channel_t en_vw_setting[] = { #endif }; -/* VW settings after the master enables the OOB channel. */ +/* VW settings after the controller enables the OOB channel. */ static const struct vw_channel_t en_oob_setting[] = { {ESPI_SYSTEM_EVENT_VW_IDX_4, VW_LEVEL_FIELD(0), VW_VALID_FIELD(VW_IDX_4_OOB_RST_ACK)}, }; -/* VW settings after the master enables the flash channel. */ +/* VW settings after the controller enables the flash channel. */ static const struct vw_channel_t en_flash_setting[] = { {ESPI_SYSTEM_EVENT_VW_IDX_5, VW_LEVEL_FIELD(VW_IDX_5_BTLD_STATUS_DONE), @@ -63,7 +63,7 @@ static const struct vw_channel_t vw_host_startup_setting[] = { /* VW signals used in eSPI (NOTE: must match order of enum espi_vw_signal). */ static const struct vw_channel_t vw_channel_list[] = { - /* index 02h: master to slave. */ + /* index 02h: controller to peripheral. */ VW_CHAN(VW_SLP_S3_L, ESPI_SYSTEM_EVENT_VW_IDX_2, VW_LEVEL_FIELD(VW_IDX_2_SLP_S3), @@ -76,7 +76,7 @@ static const struct vw_channel_t vw_channel_list[] = { ESPI_SYSTEM_EVENT_VW_IDX_2, VW_LEVEL_FIELD(VW_IDX_2_SLP_S5), VW_VALID_FIELD(VW_IDX_2_SLP_S5)), - /* index 03h: master to slave. */ + /* index 03h: controller to peripheral. */ VW_CHAN(VW_SUS_STAT_L, ESPI_SYSTEM_EVENT_VW_IDX_3, VW_LEVEL_FIELD(VW_IDX_3_SUS_STAT), @@ -89,7 +89,7 @@ static const struct vw_channel_t vw_channel_list[] = { ESPI_SYSTEM_EVENT_VW_IDX_3, VW_LEVEL_FIELD(VW_IDX_3_OOB_RST_WARN), VW_VALID_FIELD(VW_IDX_3_OOB_RST_WARN)), - /* index 04h: slave to master. */ + /* index 04h: peripheral to controller. */ VW_CHAN(VW_OOB_RST_ACK, ESPI_SYSTEM_EVENT_VW_IDX_4, VW_LEVEL_FIELD(VW_IDX_4_OOB_RST_ACK), @@ -102,7 +102,7 @@ static const struct vw_channel_t vw_channel_list[] = { ESPI_SYSTEM_EVENT_VW_IDX_4, VW_LEVEL_FIELD(VW_IDX_4_PME), VW_VALID_FIELD(VW_IDX_4_PME)), - /* index 05h: slave to master. */ + /* index 05h: peripheral to controller. */ VW_CHAN(VW_ERROR_FATAL, ESPI_SYSTEM_EVENT_VW_IDX_5, VW_LEVEL_FIELD(VW_IDX_5_FATAL), @@ -115,7 +115,7 @@ static const struct vw_channel_t vw_channel_list[] = { ESPI_SYSTEM_EVENT_VW_IDX_5, VW_LEVEL_FIELD(VW_IDX_5_BTLD_STATUS_DONE), VW_VALID_FIELD(VW_IDX_5_BTLD_STATUS_DONE)), - /* index 06h: slave to master. */ + /* index 06h: peripheral to controller. */ VW_CHAN(VW_SCI_L, ESPI_SYSTEM_EVENT_VW_IDX_6, VW_LEVEL_FIELD(VW_IDX_6_SCI), @@ -132,17 +132,17 @@ static const struct vw_channel_t vw_channel_list[] = { ESPI_SYSTEM_EVENT_VW_IDX_6, VW_LEVEL_FIELD(VW_IDX_6_HOST_RST_ACK), VW_VALID_FIELD(VW_IDX_6_HOST_RST_ACK)), - /* index 07h: master to slave. */ + /* index 07h: controller to peripheral. */ VW_CHAN(VW_HOST_RST_WARN, ESPI_SYSTEM_EVENT_VW_IDX_7, VW_LEVEL_FIELD(VW_IDX_7_HOST_RST_WARN), VW_VALID_FIELD(VW_IDX_7_HOST_RST_WARN)), - /* index 40h: slave to master. */ + /* index 40h: peripheral to controller. */ VW_CHAN(VW_SUS_ACK, ESPI_SYSTEM_EVENT_VW_IDX_40, VW_LEVEL_FIELD(VW_IDX_40_SUS_ACK), VW_VALID_FIELD(VW_IDX_40_SUS_ACK)), - /* index 41h: master to slave. */ + /* index 41h: controller to peripheral. */ VW_CHAN(VW_SUS_WARN_L, ESPI_SYSTEM_EVENT_VW_IDX_41, VW_LEVEL_FIELD(VW_IDX_41_SUS_WARN), @@ -155,7 +155,7 @@ static const struct vw_channel_t vw_channel_list[] = { ESPI_SYSTEM_EVENT_VW_IDX_41, VW_LEVEL_FIELD(VW_IDX_41_SLP_A), VW_VALID_FIELD(VW_IDX_41_SLP_A)), - /* index 42h: master to slave. */ + /* index 42h: controller to peripheral. */ VW_CHAN(VW_SLP_LAN, ESPI_SYSTEM_EVENT_VW_IDX_42, VW_LEVEL_FIELD(VW_IDX_42_SLP_LAN), @@ -496,32 +496,32 @@ static void espi_enable_reset(void) gpio_enable_interrupt(GPIO_ESPI_RESET_L); } -/* Interrupt event of master enables the VW channel. */ +/* Interrupt event of controller enables the VW channel. */ static void espi_vw_en_asserted(uint8_t evt) { /* - * Configure slave to master virtual wire outputs after receiving - * the event of master enables the VW channel. + * Configure peripheral to controller virtual wire outputs after + * receiving the event of controller enables the VW channel. */ espi_configure_vw(en_vw_setting, ARRAY_SIZE(en_vw_setting)); } -/* Interrupt event of master enables the OOB channel. */ +/* Interrupt event of controller enables the OOB channel. */ static void espi_oob_en_asserted(uint8_t evt) { /* - * Configure slave to master virtual wire outputs after receiving - * the event of master enables the OOB channel. + * Configure peripheral to controller virtual wire outputs after + * receiving the event of controller enables the OOB channel. */ espi_configure_vw(en_oob_setting, ARRAY_SIZE(en_oob_setting)); } -/* Interrupt event of master enables the flash channel. */ +/* Interrupt event of controller enables the flash channel. */ static void espi_flash_en_asserted(uint8_t evt) { /* - * Configure slave to master virtual wire outputs after receiving - * the event of master enables the flash channel. + * Configure peripheral to controller virtual wire outputs after + * receiving the event of controller enables the flash channel. */ espi_configure_vw(en_flash_setting, ARRAY_SIZE(en_flash_setting)); } @@ -560,8 +560,8 @@ void espi_interrupt(void) espi_isr[i](i); } /* - * bit7: the slave has received a peripheral posted/completion. - * This bit indicates the slave has received a packet from eSPI + * bit7: the peripheral has received a peripheral posted/completion. + * This bit indicates the peripheral has received a packet from eSPI * peripheral channel. We can check cycle type (bit[3-0] at ESPCTRL0) * and make corresponding modification if needed. */ @@ -590,7 +590,7 @@ void espi_enable_pad(int enable) void espi_init(void) { /* - * bit[2-0], the maximum frequency of operation supported by slave: + * bit[2-0], the maximum frequency of operation supported by peripheral: * 000b: 20MHz * 001b: 25MHz * 010b: 33MHz diff --git a/chip/it83xx/lpc.c b/chip/it83xx/lpc.c index ae66181430..867d9e024f 100644 --- a/chip/it83xx/lpc.c +++ b/chip/it83xx/lpc.c @@ -565,7 +565,7 @@ static void lpc_init(void) { enum ec2i_message ec2i_r; - /* SPI slave interface is disabled */ + /* SPI peripheral interface is disabled */ IT83XX_GCTRL_SSCR = 0; /* * DLM 52k~56k size select enable. diff --git a/chip/it83xx/spi.c b/chip/it83xx/spi.c index a21ba8c10d..465d588fc3 100644 --- a/chip/it83xx/spi.c +++ b/chip/it83xx/spi.c @@ -49,7 +49,7 @@ static uint8_t out_msg[SPI_TX_MAX_FIFO_SIZE] __aligned(4); /* Parameters used by host protocols */ static struct host_packet spi_packet; -enum spi_slave_state_machine { +enum spi_peripheral_state_machine { /* Ready to receive next request */ SPI_STATE_READY_TO_RECV, /* Receiving request */ @@ -60,7 +60,7 @@ enum spi_slave_state_machine { SPI_STATE_RX_BAD, SPI_STATE_COUNT, -} spi_slv_state; +} spi_peripheral_state; static const int spi_response_state[] = { [SPI_STATE_READY_TO_RECV] = EC_SPI_OLD_READY, @@ -72,9 +72,9 @@ BUILD_ASSERT(ARRAY_SIZE(spi_response_state) == SPI_STATE_COUNT); static void spi_set_state(int state) { - /* SPI slave state machine */ - spi_slv_state = state; - /* Response spi slave state */ + /* SPI peripheral state machine */ + spi_peripheral_state = state; + /* Response spi peripheral state */ IT83XX_SPI_SPISRDR = spi_response_state[state]; } @@ -118,12 +118,12 @@ static void spi_response_host_data(uint8_t *out_msg_addr, int tx_size) /* * After writing data to Tx FIFO is finished, this bit will - * be to indicate the SPI slave controller. + * be to indicate the SPI peripheral. */ IT83XX_SPI_TXFCR = IT83XX_SPI_TXFS; /* End Tx FIFO access */ IT83XX_SPI_TXRXFAR = 0; - /* SPI slave read Tx FIFO */ + /* SPI peripheral read Tx FIFO */ IT83XX_SPI_FCR = IT83XX_SPI_SPISRTXF; } @@ -138,7 +138,7 @@ static void spi_send_response_packet(struct host_packet *pkt) { int i, tx_size; - if (spi_slv_state != SPI_STATE_PROCESSING) { + if (spi_peripheral_state != SPI_STATE_PROCESSING) { CPRINTS("The request data is not processing."); return; } @@ -170,7 +170,7 @@ static void spi_host_request_data(uint8_t *in_msg_addr, int count) */ for (i = 0; i < count; i += 4) - /* Get data from master to buffer */ + /* Get data from controller to buffer */ *(uint32_t *)(in_msg_addr + i) = IT83XX_SPI_RXFRDRB0; } @@ -266,7 +266,7 @@ void spi_slv_int_handler(void) * sleep bit of SPI in S3 or lower. */ enable_sleep(SLEEP_MASK_SPI); - /* CS# is deasserted, so write clear all slave status */ + /* CS# is deasserted, so write clear all peripheral status */ IT83XX_SPI_ISR = 0xff; } /* @@ -276,7 +276,7 @@ void spi_slv_int_handler(void) * requested data. */ if (IT83XX_SPI_RX_VLISR & IT83XX_SPI_RVLI) { - /* write clear slave status */ + /* write clear peripheral status */ IT83XX_SPI_RX_VLISR = IT83XX_SPI_RVLI; /* Parse header for version of spi-protocol */ spi_parse_header(); @@ -341,9 +341,9 @@ static void spi_init(void) spi_set_state(SPI_STATE_READY_TO_RECV); /* Interrupt status register(write one to clear) */ IT83XX_SPI_ISR = 0xff; - /* SPI slave controller enable (after settings are ready) */ + /* SPI peripheral enable (after settings are ready) */ IT83XX_SPI_SPISGCR = IT83XX_SPI_SPISCEN; - /* Enable SPI slave interrupt */ + /* Enable SPI peripheral interrupt */ task_clear_pending_irq(IT83XX_IRQ_SPI_SLAVE); task_enable_irq(IT83XX_IRQ_SPI_SLAVE); /* Enable SPI chip select pin interrupt */ @@ -352,7 +352,7 @@ static void spi_init(void) } DECLARE_HOOK(HOOK_INIT, spi_init, HOOK_PRIO_INIT_SPI); -/* reset slave SPI module */ +/* reset peripheral SPI module */ static void spi_reset(void) { /* |