summaryrefslogtreecommitdiff
path: root/chip
diff options
context:
space:
mode:
authorHyungwoo Yang <hyungwoo.yang@intel.com>2019-04-17 17:08:44 -0700
committerchrome-bot <chrome-bot@chromium.org>2019-04-20 03:58:45 -0700
commitb8281e7b31873e3f3321ec7b15d04d41efca0136 (patch)
tree5f0c02bf09246578cbf051ea5212e21003c9a94b /chip
parent88c2046eaf7d4cd30958b644e41f4779752c2d4a (diff)
downloadchrome-ec-b8281e7b31873e3f3321ec7b15d04d41efca0136.tar.gz
ish: fix extra timer interrupt
currently we often clear timer interrupt status before the main counter gets increased. Due to this, HPET timer generates extra interrupt since the counter and the comparator have still the same value(?). This introduces wrong wall clock and some extra interrupts for events. ... [17178.756500 HC 0x67 err 9] [21476.327769 HC 0x67 err 9] <= extra interrupt changed wall clock ... [30051.881380 HC 0x67 err 9] [34363.588056 HC 0x67 err 9] <= extra interrupt changed wall clock ... [38653.530377 HC 0x67 err 9] [42961.575341 HC 0x67 err 9] <= extra interrupt changed wall clock This patch make sure there's no extra interrupt. BRANCH=none BUG=none TEST=Tested on Arcada platform Change-Id: Ia57f4f2e91b52f0466f248388643d997d60b3221 Signed-off-by: Hyungwoo Yang <hyungwoo.yang@intel.com> Reviewed-on: https://chromium-review.googlesource.com/1573199 Commit-Ready: Jack Rosenthal <jrosenth@chromium.org> Tested-by: Jack Rosenthal <jrosenth@chromium.org> Reviewed-by: Jack Rosenthal <jrosenth@chromium.org>
Diffstat (limited to 'chip')
-rw-r--r--chip/ish/hwtimer.c10
1 files changed, 10 insertions, 0 deletions
diff --git a/chip/ish/hwtimer.c b/chip/ish/hwtimer.c
index 393e1af4af..6a0c4ea366 100644
--- a/chip/ish/hwtimer.c
+++ b/chip/ish/hwtimer.c
@@ -219,6 +219,16 @@ static void __hw_clock_source_irq(int timer_id)
* overflowed).
*/
process_timers(timer_id == 0);
+
+ /*
+ * Clearing interrupt status before the main counter gets increased
+ * generates an extra interrupt.
+ * Here, we checks interrupt status register to prevent the extra
+ * interrupt. It's safe to clear the interrupt again here since
+ * there's at least MINIMUM_EVENT_DELAY_US delay for the next event
+ */
+ while (HPET_INTR_CLEAR & BIT(timer_id))
+ HPET_INTR_CLEAR = BIT(timer_id);
}
void __hw_clock_source_irq_0(void)