diff options
author | Shawn Nematbakhsh <shawnn@chromium.org> | 2016-02-26 17:31:01 -0800 |
---|---|---|
committer | chrome-bot <chrome-bot@chromium.org> | 2016-04-19 19:19:10 -0700 |
commit | b94c4eb99da18a276a5d4dd87f108022224c1593 (patch) | |
tree | 35d59f5c199decfe3032aa68f88eccb8e28ff1d5 /chip | |
parent | cfca3ff970d92cf73631694383927d7ff7014004 (diff) | |
download | chrome-ec-b94c4eb99da18a276a5d4dd87f108022224c1593.tar.gz |
snoball: Add support for proto 0.9 board
This board uses a different stm32f0 MCU and has significant
architectural changes.
BUG=chrome-os-partner:50549
BRANCH=None
TEST=`make buildall -j`, verify snoball boots to console
Change-Id: I842a3efc5e179b33bbf0441e8d4ea07fa006e3fe
Signed-off-by: Shawn Nematbakhsh <shawnn@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/329439
Commit-Ready: Shawn N <shawnn@chromium.org>
Tested-by: Shawn N <shawnn@chromium.org>
Reviewed-by: Vincent Palatin <vpalatin@chromium.org>
Diffstat (limited to 'chip')
-rw-r--r-- | chip/stm32/config-stm32f03x.h | 10 | ||||
-rw-r--r-- | chip/stm32/config_chip.h | 5 |
2 files changed, 13 insertions, 2 deletions
diff --git a/chip/stm32/config-stm32f03x.h b/chip/stm32/config-stm32f03x.h index c22855f046..246b4374cf 100644 --- a/chip/stm32/config-stm32f03x.h +++ b/chip/stm32/config-stm32f03x.h @@ -3,8 +3,15 @@ * found in the LICENSE file. */ -/* Memory mapping */ +#ifdef CHIP_VARIANT_STM32F03X8 +#define CONFIG_FLASH_SIZE 0x00010000 +#define CONFIG_RAM_SIZE 0x00002000 +#else #define CONFIG_FLASH_SIZE 0x00008000 +#define CONFIG_RAM_SIZE 0x00001000 +#endif + +/* Memory mapping */ #define CONFIG_FLASH_BANK_SIZE 0x1000 #define CONFIG_FLASH_ERASE_SIZE 0x0400 /* erase bank size */ #define CONFIG_FLASH_WRITE_SIZE 0x0002 /* minimum write size */ @@ -13,7 +20,6 @@ #define CONFIG_FLASH_WRITE_IDEAL_SIZE 0x0002 #define CONFIG_RAM_BASE 0x20000000 -#define CONFIG_RAM_SIZE 0x00001000 /* Number of IRQ vectors on the NVIC */ #define CONFIG_IRQ_COUNT 32 diff --git a/chip/stm32/config_chip.h b/chip/stm32/config_chip.h index f0d1fa85d1..f77fdf059e 100644 --- a/chip/stm32/config_chip.h +++ b/chip/stm32/config_chip.h @@ -18,6 +18,11 @@ #define CONFIG_UART_CONSOLE 1 /* Use variant specific configuration for flash / UART / IRQ */ +/* STM32F03X8 it itself a variant of STM32F03X with non-default flash sizes */ +#ifdef CHIP_VARIANT_STM32F03X8 +#define CHIP_VARIANT_STM32F03X +#endif + #if defined(CHIP_VARIANT_STM32L15X) #include "config-stm32l15x.h" #elif defined(CHIP_VARIANT_STM32L100) |