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authorDaisuke Nojiri <dnojiri@chromium.org>2017-05-30 13:41:13 -0700
committerchrome-bot <chrome-bot@chromium.org>2017-06-28 23:23:41 -0700
commit031dccad78b9d4df6b970bc36ef2f9d469239708 (patch)
treec3c9b8e9b0b96a1de9fba5da3c6c65d70cfc4bfe /chip
parentc74c0785927ab7770143d5ff503b4c0ca9df9ff1 (diff)
downloadchrome-ec-031dccad78b9d4df6b970bc36ef2f9d469239708.tar.gz
vboot_ec:Read try slot from BBRAM
This patch makes EC read the slot to verify and jump to from the battery backed up RAM (BBRAM). BUG=b:38462249 BRANCH=none TEST=Boot Fizz Change-Id: I0c78861ea3ccdc45d0aa08e690e3a68f53658409 Signed-off-by: Daisuke Nojiri <dnojiri@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/518255
Diffstat (limited to 'chip')
-rw-r--r--chip/npcx/system.c4
-rw-r--r--chip/npcx/system_chip.h1
2 files changed, 5 insertions, 0 deletions
diff --git a/chip/npcx/system.c b/chip/npcx/system.c
index 15d575658d..a3dad67bc5 100644
--- a/chip/npcx/system.c
+++ b/chip/npcx/system.c
@@ -185,6 +185,10 @@ static int bbram_idx_lookup(enum system_bbram_idx idx)
if (idx == SYSTEM_BBRAM_IDX_PD1)
return BBRM_DATA_INDEX_PD1;
#endif
+#ifdef CONFIG_VBOOT_EC
+ if (idx == SYSTEM_BBRAM_IDX_TRY_SLOT)
+ return BBRM_DATA_INDEX_TRY_SLOT;
+#endif
return -1;
}
diff --git a/chip/npcx/system_chip.h b/chip/npcx/system_chip.h
index 21560895c5..37e49a406c 100644
--- a/chip/npcx/system_chip.h
+++ b/chip/npcx/system_chip.h
@@ -19,6 +19,7 @@ enum bbram_data_index {
BBRM_DATA_INDEX_WAKE = 8, /* Wake reasons for hibernate */
BBRM_DATA_INDEX_PD0 = 12, /* USB-PD saved port0 state */
BBRM_DATA_INDEX_PD1 = 13, /* USB-PD saved port1 state */
+ BBRM_DATA_INDEX_TRY_SLOT = 14, /* Vboot EC try slot */
BBRM_DATA_INDEX_VBNVCNTXT = 16, /* VbNvContext for ARM arch */
BBRM_DATA_INDEX_RAMLOG = 32, /* RAM log for Booter */
BBRM_DATA_INDEX_PANIC_FLAGS = 35, /* Flag to indicate validity of