stm32: Manually fix separate register files

This fixes the CPP conditionals that could not be separated
using the split script.

BRANCH=none
BUG=none
TEST=make buildall -j
TEST=Grab registers-extract.bash
     from http://go/bit/hesling/6385147721023488/4 .
     chmod +x ./registers-extract.bash
     ./registers-extract.bash board-regs-new
     git checkout cros/master
     ./registers-extract.bash board-regs-original
     diff board-regs-original board-regs-new
     [ $? -eq 0 ] && echo "# Good2Go" || echo "# Bad"

Signed-off-by: Craig Hesling <hesling@chromium.org>
Change-Id: I40eac114cd5ed7abe708cc51242a3b267aaaf118
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1693876
Reviewed-by: Daisuke Nojiri <dnojiri@chromium.org>

5 files changed, 4 insertions, 92 deletions

diff --git a/chip/stm32/registers-stm32f0.h b/chip/stm32/registers-stm32f0.h
index 9104f19eae..d495f76f4d 100644
--- a/chip/stm32/registers-stm32f0.h
+++ b/chip/stm32/registers-stm32f0.h
@@ -680,7 +680,6 @@ enum dma_channel {
 	STM32_DMAC_I2C2_RX = STM32_DMAC_CH5,
 	STM32_DMAC_USART1_TX = STM32_DMAC_CH4,
 	STM32_DMAC_USART1_RX = STM32_DMAC_CH5,
-// TODO(hesling): The following sections will need some manual fixing.
 #if !defined(CHIP_VARIANT_STM32F03X) && !defined(CHIP_VARIANT_STM32F05X)
 	STM32_DMAC_USART2_RX = STM32_DMAC_CH6,
 	STM32_DMAC_USART2_TX = STM32_DMAC_CH7,
@@ -688,26 +687,11 @@ enum dma_channel {
 	STM32_DMAC_I2C1_RX = STM32_DMAC_CH7,
 	STM32_DMAC_PMSE_ROW = STM32_DMAC_CH6,
 	STM32_DMAC_PMSE_COL = STM32_DMAC_CH7,
-#ifdef CHIP_FAMILY_STM32L4
-	STM32_DMAC_SPI2_RX = STM32_DMAC_CH4,
-	STM32_DMAC_SPI2_TX = STM32_DMAC_CH5,
-	STM32_DMAC_SPI3_RX = STM32_DMAC_CH9,
-	STM32_DMAC_SPI3_TX = STM32_DMAC_CH10,
-	STM32_DMAC_COUNT = 14,
-#elif defined(CHIP_VARIANT_STM32F373)
-	STM32_DMAC_SPI2_RX = STM32_DMAC_CH4,
-	STM32_DMAC_SPI2_TX = STM32_DMAC_CH5,
-	STM32_DMAC_SPI3_RX = STM32_DMAC_CH9,
-	STM32_DMAC_SPI3_TX = STM32_DMAC_CH10,
-
-	STM32_DMAC_COUNT = 10,
-#else
 	STM32_DMAC_SPI2_RX = STM32_DMAC_CH6,
 	STM32_DMAC_SPI2_TX = STM32_DMAC_CH7,
 
 	/* Only DMA1 (with 7 channels) is present on STM32L151x */
 	STM32_DMAC_COUNT = 7,
-#endif
 
 #else /* stm32f03x and stm32f05x have only 5 channels */
 	STM32_DMAC_COUNT = 5,
@@ -746,9 +730,7 @@ typedef volatile struct stm32_dma_regs stm32_dma_regs_t;
 
 #define STM32_DMA_CCR_CHANNEL(channel)		 (0)
 
-// TODO(hesling): The following section will need some manual fixing.
-#if defined(CHIP_FAMILY_STM32F3) || defined(CHIP_FAMILY_STM32L4) || \
-	defined(CHIP_VARIANT_STM32F09X)
+#if defined(CHIP_VARIANT_STM32F09X)
 #define STM32_DMA2_REGS ((stm32_dma_regs_t *)STM32_DMA2_BASE)
 #define STM32_DMA_REGS(channel) \
 	((channel) < STM32_DMAC_PER_CTLR ? STM32_DMA1_REGS : STM32_DMA2_REGS)
diff --git a/chip/stm32/registers-stm32f3.h b/chip/stm32/registers-stm32f3.h
index eb753a79fb..79cb8286d0 100644
--- a/chip/stm32/registers-stm32f3.h
+++ b/chip/stm32/registers-stm32f3.h
@@ -585,7 +585,7 @@ typedef volatile struct stm32_spi_regs stm32_spi_regs_t;
 #define EXTI_RTC_ALR_EVENT BIT(17)
 
 /* --- ADC --- */
-#if defined(CHIP_VARIANT_STM32F373) || defined(CHIP_FAMILY_STM32F4)
+#if defined(CHIP_VARIANT_STM32F373)
 #define STM32_ADC_SR               REG32(STM32_ADC1_BASE + 0x00)
 #define STM32_ADC_CR1              REG32(STM32_ADC1_BASE + 0x04)
 #define STM32_ADC_CR2              REG32(STM32_ADC1_BASE + 0x08)
@@ -740,21 +740,13 @@ enum dma_channel {
 	STM32_DMAC_I2C2_RX = STM32_DMAC_CH5,
 	STM32_DMAC_USART1_TX = STM32_DMAC_CH4,
 	STM32_DMAC_USART1_RX = STM32_DMAC_CH5,
-// TODO(hesling): The following sections will need some manual fixing.
-#if !defined(CHIP_VARIANT_STM32F03X) && !defined(CHIP_VARIANT_STM32F05X)
 	STM32_DMAC_USART2_RX = STM32_DMAC_CH6,
 	STM32_DMAC_USART2_TX = STM32_DMAC_CH7,
 	STM32_DMAC_I2C1_TX = STM32_DMAC_CH6,
 	STM32_DMAC_I2C1_RX = STM32_DMAC_CH7,
 	STM32_DMAC_PMSE_ROW = STM32_DMAC_CH6,
 	STM32_DMAC_PMSE_COL = STM32_DMAC_CH7,
-#ifdef CHIP_FAMILY_STM32L4
-	STM32_DMAC_SPI2_RX = STM32_DMAC_CH4,
-	STM32_DMAC_SPI2_TX = STM32_DMAC_CH5,
-	STM32_DMAC_SPI3_RX = STM32_DMAC_CH9,
-	STM32_DMAC_SPI3_TX = STM32_DMAC_CH10,
-	STM32_DMAC_COUNT = 14,
-#elif defined(CHIP_VARIANT_STM32F373)
+#if defined(CHIP_VARIANT_STM32F373)
 	STM32_DMAC_SPI2_RX = STM32_DMAC_CH4,
 	STM32_DMAC_SPI2_TX = STM32_DMAC_CH5,
 	STM32_DMAC_SPI3_RX = STM32_DMAC_CH9,
@@ -768,10 +760,6 @@ enum dma_channel {
 	/* Only DMA1 (with 7 channels) is present on STM32L151x */
 	STM32_DMAC_COUNT = 7,
 #endif
-
-#else /* stm32f03x and stm32f05x have only 5 channels */
-	STM32_DMAC_COUNT = 5,
-#endif
 };
 
 #define STM32_DMAC_PER_CTLR 8
@@ -806,18 +794,12 @@ typedef volatile struct stm32_dma_regs stm32_dma_regs_t;
 
 #define STM32_DMA_CCR_CHANNEL(channel)		 (0)
 
-// TODO(hesling): The following section will need some manual fixing.
-#if defined(CHIP_FAMILY_STM32F3) || defined(CHIP_FAMILY_STM32L4) || \
-	defined(CHIP_VARIANT_STM32F09X)
 #define STM32_DMA2_REGS ((stm32_dma_regs_t *)STM32_DMA2_BASE)
 #define STM32_DMA_REGS(channel) \
 	((channel) < STM32_DMAC_PER_CTLR ? STM32_DMA1_REGS : STM32_DMA2_REGS)
 #define STM32_DMA_CSELR(channel) \
 	REG32(((channel) < STM32_DMAC_PER_CTLR ? \
 			STM32_DMA1_BASE : STM32_DMA2_BASE)  + 0xA8)
-#else
-#define STM32_DMA_REGS(channel) STM32_DMA1_REGS
-#endif
 
 /* Bits for DMA controller regs (isr and ifcr) */
 #define STM32_DMA_CH_OFFSET(channel)   (4 * ((channel) % STM32_DMAC_PER_CTLR))
diff --git a/chip/stm32/registers-stm32f4.h b/chip/stm32/registers-stm32f4.h
index fb1ce2c6f2..9be1920846 100644
--- a/chip/stm32/registers-stm32f4.h
+++ b/chip/stm32/registers-stm32f4.h
@@ -231,9 +231,7 @@
 /* Register definitions */
 
 /* --- USART --- */
-#if defined(CHIP_FAMILY_STM32F0) || defined(CHIP_FAMILY_STM32F3) || \
-	defined(CHIP_FAMILY_STM32L4) || defined(CHIP_VARIANT_STM32F76X) || \
-	defined(CHIP_FAMILY_STM32H7)
+#if defined(CHIP_VARIANT_STM32F76X)
 #define STM32_USART_CR1(base)      STM32_USART_REG(base, 0x00)
 #define STM32_USART_CR1_UE		BIT(0)
 #define STM32_USART_CR1_UESM            BIT(1)
diff --git a/chip/stm32/registers-stm32l.h b/chip/stm32/registers-stm32l.h
index a414a52818..d4b59780b5 100644
--- a/chip/stm32/registers-stm32l.h
+++ b/chip/stm32/registers-stm32l.h
@@ -612,38 +612,16 @@ enum dma_channel {
 	STM32_DMAC_I2C2_RX = STM32_DMAC_CH5,
 	STM32_DMAC_USART1_TX = STM32_DMAC_CH4,
 	STM32_DMAC_USART1_RX = STM32_DMAC_CH5,
-// TODO(hesling): The following sections will need some manual fixing.
-#if !defined(CHIP_VARIANT_STM32F03X) && !defined(CHIP_VARIANT_STM32F05X)
 	STM32_DMAC_USART2_RX = STM32_DMAC_CH6,
 	STM32_DMAC_USART2_TX = STM32_DMAC_CH7,
 	STM32_DMAC_I2C1_TX = STM32_DMAC_CH6,
 	STM32_DMAC_I2C1_RX = STM32_DMAC_CH7,
 	STM32_DMAC_PMSE_ROW = STM32_DMAC_CH6,
 	STM32_DMAC_PMSE_COL = STM32_DMAC_CH7,
-#ifdef CHIP_FAMILY_STM32L4
-	STM32_DMAC_SPI2_RX = STM32_DMAC_CH4,
-	STM32_DMAC_SPI2_TX = STM32_DMAC_CH5,
-	STM32_DMAC_SPI3_RX = STM32_DMAC_CH9,
-	STM32_DMAC_SPI3_TX = STM32_DMAC_CH10,
-	STM32_DMAC_COUNT = 14,
-#elif defined(CHIP_VARIANT_STM32F373)
-	STM32_DMAC_SPI2_RX = STM32_DMAC_CH4,
-	STM32_DMAC_SPI2_TX = STM32_DMAC_CH5,
-	STM32_DMAC_SPI3_RX = STM32_DMAC_CH9,
-	STM32_DMAC_SPI3_TX = STM32_DMAC_CH10,
-
-	STM32_DMAC_COUNT = 10,
-#else
 	STM32_DMAC_SPI2_RX = STM32_DMAC_CH6,
 	STM32_DMAC_SPI2_TX = STM32_DMAC_CH7,
-
 	/* Only DMA1 (with 7 channels) is present on STM32L151x */
 	STM32_DMAC_COUNT = 7,
-#endif
-
-#else /* stm32f03x and stm32f05x have only 5 channels */
-	STM32_DMAC_COUNT = 5,
-#endif
 };
 
 #define STM32_DMAC_PER_CTLR 8
diff --git a/chip/stm32/registers-stm32l4.h b/chip/stm32/registers-stm32l4.h
index 1d5ba60ef7..e1ae7c9376 100644
--- a/chip/stm32/registers-stm32l4.h
+++ b/chip/stm32/registers-stm32l4.h
@@ -692,38 +692,17 @@ enum dma_channel {
 	STM32_DMAC_I2C2_RX = STM32_DMAC_CH5,
 	STM32_DMAC_USART1_TX = STM32_DMAC_CH4,
 	STM32_DMAC_USART1_RX = STM32_DMAC_CH5,
-// TODO(hesling): The following sections will need some manual fixing.
-#if !defined(CHIP_VARIANT_STM32F03X) && !defined(CHIP_VARIANT_STM32F05X)
 	STM32_DMAC_USART2_RX = STM32_DMAC_CH6,
 	STM32_DMAC_USART2_TX = STM32_DMAC_CH7,
 	STM32_DMAC_I2C1_TX = STM32_DMAC_CH6,
 	STM32_DMAC_I2C1_RX = STM32_DMAC_CH7,
 	STM32_DMAC_PMSE_ROW = STM32_DMAC_CH6,
 	STM32_DMAC_PMSE_COL = STM32_DMAC_CH7,
-#ifdef CHIP_FAMILY_STM32L4
 	STM32_DMAC_SPI2_RX = STM32_DMAC_CH4,
 	STM32_DMAC_SPI2_TX = STM32_DMAC_CH5,
 	STM32_DMAC_SPI3_RX = STM32_DMAC_CH9,
 	STM32_DMAC_SPI3_TX = STM32_DMAC_CH10,
 	STM32_DMAC_COUNT = 14,
-#elif defined(CHIP_VARIANT_STM32F373)
-	STM32_DMAC_SPI2_RX = STM32_DMAC_CH4,
-	STM32_DMAC_SPI2_TX = STM32_DMAC_CH5,
-	STM32_DMAC_SPI3_RX = STM32_DMAC_CH9,
-	STM32_DMAC_SPI3_TX = STM32_DMAC_CH10,
-
-	STM32_DMAC_COUNT = 10,
-#else
-	STM32_DMAC_SPI2_RX = STM32_DMAC_CH6,
-	STM32_DMAC_SPI2_TX = STM32_DMAC_CH7,
-
-	/* Only DMA1 (with 7 channels) is present on STM32L151x */
-	STM32_DMAC_COUNT = 7,
-#endif
-
-#else /* stm32f03x and stm32f05x have only 5 channels */
-	STM32_DMAC_COUNT = 5,
-#endif
 };
 
 #define STM32_DMAC_PER_CTLR 8
@@ -757,19 +736,12 @@ typedef volatile struct stm32_dma_regs stm32_dma_regs_t;
 
 
 #define STM32_DMA_CCR_CHANNEL(channel)		 (0)
-
-// TODO(hesling): The following section will need some manual fixing.
-#if defined(CHIP_FAMILY_STM32F3) || defined(CHIP_FAMILY_STM32L4) || \
-	defined(CHIP_VARIANT_STM32F09X)
 #define STM32_DMA2_REGS ((stm32_dma_regs_t *)STM32_DMA2_BASE)
 #define STM32_DMA_REGS(channel) \
 	((channel) < STM32_DMAC_PER_CTLR ? STM32_DMA1_REGS : STM32_DMA2_REGS)
 #define STM32_DMA_CSELR(channel) \
 	REG32(((channel) < STM32_DMAC_PER_CTLR ? \
 			STM32_DMA1_BASE : STM32_DMA2_BASE)  + 0xA8)
-#else
-#define STM32_DMA_REGS(channel) STM32_DMA1_REGS
-#endif
 
 /* Bits for DMA controller regs (isr and ifcr) */
 #define STM32_DMA_CH_OFFSET(channel)   (4 * ((channel) % STM32_DMAC_PER_CTLR))