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| author | Nicolas Boichat <drinkcat@chromium.org> | 2017-08-22 14:02:21 +0800 |
|---|---|---|
| committer | chrome-bot <chrome-bot@chromium.org> | 2017-08-23 06:23:26 -0700 |
| commit | 940b88754c686352a8cbfacf82c5167f486d8f8f (patch) | |
| tree | 31a9360d9d611fe2fc8d91993b0aef8e040756fb /chip | |
| parent | 9ea128966ba11e4a756d1a83fd0fe2d247d0312c (diff) | |
| download | chrome-ec-940b88754c686352a8cbfacf82c5167f486d8f8f.tar.gz | |
chip/stm32/i2c-stm32f0: Further adjust 400kHz setting (48Mhz clock source)
It turns out SCLH = 0x5 is still a little fast (411 kHz on hammer),
let's update it to 0x6.
See 5e6f9a2b38 "chip/stm32/i2c-stm32f0: Adjust 400kHz setting (48Mhz clock source)"
for details.
BRANCH=none
BUG=b:36172041
TEST=Measure I2C speed to be <400 kHz on hammer
Change-Id: I2b5acc532963c407144b8e2a7786d3e2302192d3
Reviewed-on: https://chromium-review.googlesource.com/625507
Commit-Ready: Nicolas Boichat <drinkcat@chromium.org>
Tested-by: Toshak Singhal <toshak@google.com>
Reviewed-by: Vincent Palatin <vpalatin@chromium.org>
Diffstat (limited to 'chip')
| -rw-r--r-- | chip/stm32/i2c-stm32f0.c | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/chip/stm32/i2c-stm32f0.c b/chip/stm32/i2c-stm32f0.c index d8dbd759fc..f328b98acc 100644 --- a/chip/stm32/i2c-stm32f0.c +++ b/chip/stm32/i2c-stm32f0.c @@ -102,7 +102,7 @@ enum stm32_i2c_clk_src { static const uint32_t timingr_regs[I2C_CLK_SRC_COUNT][I2C_FREQ_COUNT] = { [I2C_CLK_SRC_48MHZ] = { [I2C_FREQ_1000KHZ] = 0x50100103, - [I2C_FREQ_400KHZ] = 0x50330509, + [I2C_FREQ_400KHZ] = 0x50330609, [I2C_FREQ_100KHZ] = 0xB0421214, }, [I2C_CLK_SRC_8MHZ] = { |