diff options
author | Bill Richardson <wfrichar@chromium.org> | 2015-11-05 13:30:15 -0800 |
---|---|---|
committer | chrome-bot <chrome-bot@chromium.org> | 2015-11-06 01:15:52 -0800 |
commit | 6a5c36bd4a3a9a5e9a8a796ee26afdbd981c9d28 (patch) | |
tree | c339696d609ec045f5cfee756d4180497a46446f /chip | |
parent | a576355153ba9f41c630c64a9c511067151f06ad (diff) | |
download | chrome-ec-6a5c36bd4a3a9a5e9a8a796ee26afdbd981c9d28.tar.gz |
Cr50: Disable customized RO image by default
A previous commit caused ToT to use a not-yet-working bootloader.
This disables that bootloader by default so that the rest of us
can continue to work. ;-)
A configuration option is added to be able to address this issue in
the future with other boards as well.
BRANCH=None
BUG=chrome-os-partner:43025, chromium:551151
TEST=make buildall -j
Also verified that both normal and customized cr50 RO images build
and work as expected.
Change-Id: Ie433b07860cb1b04c12b2609c6fa39025fc0e515
Signed-off-by: Bill Richardson <wfrichar@chromium.org>
Signed-off-by: Vadim Bendebury <vbendeb@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/310978
Diffstat (limited to 'chip')
-rw-r--r-- | chip/g/build.mk | 4 | ||||
-rw-r--r-- | chip/g/uart.c | 8 |
2 files changed, 8 insertions, 4 deletions
diff --git a/chip/g/build.mk b/chip/g/build.mk index 2981b9c0ae..2a6910b82b 100644 --- a/chip/g/build.mk +++ b/chip/g/build.mk @@ -38,14 +38,16 @@ chip-$(CONFIG_USB_BLOB)+=usb_blob.o chip-$(CONFIG_FLASH)+=flash.o +ifneq ($(CONFIG_CUSTOMIZED_RO),) custom-ro_objs-y = chip/g/loader/main.o custom-ro_objs-y += chip/g/system.o chip/g/uart.o custom-ro_objs-y += common/printf.o custom-ro_objs-y += common/util.o custom-ro_objs-y += core/cortex-m/init.o custom-ro_objs-y += core/cortex-m/panic.o - dirs-y += chip/g/loader +endif + $(out)/RO/ec.RO.flat: $(out)/util/signer diff --git a/chip/g/uart.c b/chip/g/uart.c index 9af6990a1a..665d893e11 100644 --- a/chip/g/uart.c +++ b/chip/g/uart.c @@ -14,6 +14,8 @@ static int done_uart_init_yet; +#define USE_UART_INTERRUPTS (!(defined(CONFIG_CUSTOMIZED_RO) && \ + defined(SECTION_IS_RO))) int uart_init_done(void) { return done_uart_init_yet; @@ -92,7 +94,7 @@ int uart_read_char(void) return GR_UART_RDATA(0); } -#ifndef SECTION_IS_RO +#if USE_UART_INTERRUPTS void uart_disable_interrupt(void) { task_disable_irq(GC_IRQNUM_UART0_TXINT); @@ -127,7 +129,7 @@ void uart_ec_rx_interrupt(void) uart_process_input(); } DECLARE_IRQ(GC_IRQNUM_UART0_RXINT, uart_ec_rx_interrupt, 1); -#endif /* SECTION_IS_RO ^^^^^^ NOT defined. */ +#endif /* USE_UART_INTERRUPTS */ void uart_init(void) { @@ -151,7 +153,7 @@ void uart_init(void) /* Note: doesn't do anything unless turned on in NVIC */ GR_UART_ICTRL(0) = 0x02; -#ifndef SECTION_IS_RO +#if USE_UART_INTERRUPTS /* Enable interrupts for UART0 only */ uart_enable_interrupt(); #endif |