diff options
| author | Scott Collyer <scollyer@google.com> | 2020-05-02 15:54:03 -0700 |
|---|---|---|
| committer | Commit Bot <commit-bot@chromium.org> | 2020-07-31 01:00:00 +0000 |
| commit | 843ccb38cbf8488fac1797dd474b03c40dd359f1 (patch) | |
| tree | bdda8fd00ae9ec5b4c005790b1dc7269d952dff1 /chip | |
| parent | 59afbc0bbbf7fbcaa7f85bae801ee2eca6377fcc (diff) | |
| download | chrome-ec-843ccb38cbf8488fac1797dd474b03c40dd359f1.tar.gz | |
stm32g4: Modify channel select to use DMAMUX for stm32g4
The STM32G4 family chips have similar DMA engine as some other STM32
families and therefore most of DMA code can simply be used as
is. However, the STM32G4 does have a DMAMUX and so the correct
peripheral request must be set.
BUG=b:148493929
BRANCH=None
TEST=verfied that the GPIO, clocks, and EC console over LPUART
Signed-off-by: Scott Collyer <scollyer@google.com>
Change-Id: I2694881f97558ea7b904a9b83ee20d9ec813c273
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2195549
Tested-by: Scott Collyer <scollyer@chromium.org>
Reviewed-by: Daisuke Nojiri <dnojiri@chromium.org>
Commit-Queue: Scott Collyer <scollyer@chromium.org>
Diffstat (limited to 'chip')
| -rw-r--r-- | chip/stm32/dma.c | 17 |
1 files changed, 15 insertions, 2 deletions
diff --git a/chip/stm32/dma.c b/chip/stm32/dma.c index 5fb7c4c9a6..a2ed6ca3cb 100644 --- a/chip/stm32/dma.c +++ b/chip/stm32/dma.c @@ -59,7 +59,17 @@ stm32_dma_chan_t *dma_get_channel(enum dma_channel channel) return &dma->chan[channel % STM32_DMAC_PER_CTLR]; } -#ifdef STM32_DMA_CSELR +#ifdef STM32_DMAMUX_CxCR +void dma_select_channel(enum dma_channel channel, uint8_t req) +{ + /* + * STM32G4 includes a DMAMUX block which is used to handle dma requests + * by peripherals. The correct 'req' number for a given peripheral is + * given in ST doc RM0440. + */ + STM32_DMAMUX_CxCR(channel) = req; +} +#elif defined(STM32_DMA_CSELR) void dma_select_channel(enum dma_channel channel, unsigned char stream) { /* Local channel # starting from 0 on each DMA controller */ @@ -73,7 +83,7 @@ void dma_select_channel(enum dma_channel channel, unsigned char stream) val = STM32_DMA_CSELR(channel) & ~(mask << ch * shift); STM32_DMA_CSELR(channel) = val | (stream << ch * shift); } -#endif +#endif /* STM32_DMAMUX_CxCR/STM32_DMA_CSELR */ void dma_disable(enum dma_channel channel) { @@ -233,6 +243,9 @@ void dma_init(void) { #if defined(CHIP_FAMILY_STM32L4) STM32_RCC_AHB1ENR |= STM32_RCC_AHB1ENR_DMA1EN|STM32_RCC_AHB1ENR_DMA2EN; +#elif defined(CHIP_FAMILY_STM32G4) + STM32_RCC_AHB1ENR |= STM32_RCC_AHB1ENR_DMA1EN|STM32_RCC_AHB1ENR_DMA2EN | + STM32_RCC_AHB1ENR_DMAMUXEN; #else STM32_RCC_AHBENR |= STM32_RCC_HB_DMA1; #endif |