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authorDino Li <Dino.Li@ite.com.tw>2020-10-27 16:31:00 +0800
committerCommit Bot <commit-bot@chromium.org>2020-10-28 06:00:05 +0000
commitd7d600d94e1093718d6713926289aae38ff28cf7 (patch)
tree464ed229c6bd0230d6a8f3a0a5a55c4ff14e8cf3 /chip
parenta7581b55dff2987d126af04aa2a71f16e615617b (diff)
downloadchrome-ec-d7d600d94e1093718d6713926289aae38ff28cf7.tar.gz
it83xx: add support for IT81202BX and IT81302BX
This CL applies A version's configurations to B version. They have the same HW except for new added function (eg. SPI emulate eMMC "Alternative Boot Mode") on B version. We can add new chip config option for B version in other CL if needed. BUG=none BRANCH=none TEST=Building asurada's EC image with selecting BX chip variant. Flashing the image into reworked asurada (change EC to IT81202BX) and boot to kernel. Signed-off-by: Dino Li <Dino.Li@ite.com.tw> Change-Id: I796a622df21842998ad8f808bfa189b924710649 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2501802 Reviewed-by: Eric Yilun Lin <yllin@chromium.org>
Diffstat (limited to 'chip')
-rw-r--r--chip/it83xx/config_chip_it8xxx2.h6
1 files changed, 4 insertions, 2 deletions
diff --git a/chip/it83xx/config_chip_it8xxx2.h b/chip/it83xx/config_chip_it8xxx2.h
index fd7d4e94dd..0e9b344b21 100644
--- a/chip/it83xx/config_chip_it8xxx2.h
+++ b/chip/it83xx/config_chip_it8xxx2.h
@@ -77,7 +77,9 @@
/* Chip IT83202BX actually has TCPC physical port count. */
#define IT83XX_USBPD_PHY_PORT_COUNT 3
#elif defined(CHIP_VARIANT_IT81302AX_1024) \
-|| defined(CHIP_VARIANT_IT81202AX_1024)
+|| defined(CHIP_VARIANT_IT81202AX_1024) \
+|| defined(CHIP_VARIANT_IT81302BX_1024) \
+|| defined(CHIP_VARIANT_IT81202BX_1024)
#define CONFIG_FLASH_SIZE 0x00100000
#define CONFIG_RAM_BASE 0x80100000
#define CONFIG_RAM_SIZE 0x0000f000
@@ -107,7 +109,7 @@
* Please refer to gpio_1p8v_sel[] for 1.8v GPIOs.
*/
#define IT83XX_GPIO_1P8V_PIN_EXTENDED
-#ifdef CHIP_VARIANT_IT81202AX_1024
+#if defined(CHIP_VARIANT_IT81202AX_1024) || defined(CHIP_VARIANT_IT81202BX_1024)
/* Pins of group K and L are set as internal pull-down at initialization. */
#define IT83XX_GPIO_GROUP_K_L_DEFAULT_PULL_DOWN
#endif