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author | Randall Spangler <rspangler@chromium.org> | 2012-01-30 16:11:44 -0800 |
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committer | Randall Spangler <rspangler@chromium.org> | 2012-01-30 16:11:44 -0800 |
commit | df1d8933223817b4b5afe33101e939ff243aa9f6 (patch) | |
tree | 4df40e2f79b96cc89b0435d2540c36a0c8925aa9 /chip | |
parent | 5e22f8e51b7f2c45fb6a8fee1cbe07fb705f610c (diff) | |
download | chrome-ec-df1d8933223817b4b5afe33101e939ff243aa9f6.tar.gz |
Change COMx port to COM1
Signed-off-by: Randall Spangler <rspangler@chromium.org>
BUG=chrome-os-partner:7804
TEST=boot and check UART2 output; should have coreboot debug output
Change-Id: Ia0d16498180bb7b7d466d10268a959097e385fac
Diffstat (limited to 'chip')
-rw-r--r-- | chip/lm4/lpc.c | 6 |
1 files changed, 3 insertions, 3 deletions
diff --git a/chip/lm4/lpc.c b/chip/lm4/lpc.c index 5155befb3e..70db8dbe19 100644 --- a/chip/lm4/lpc.c +++ b/chip/lm4/lpc.c @@ -96,9 +96,9 @@ int lpc_init(void) /* Unmask interrupt for host command writes */ LM4_LPC_LPCIM |= LM4_LPC_INT_MASK(LPC_CH_USER, 4); - /* Set LPC channel 7 to I/O address 0x2F8 (COM2), bytes 8-15. - * Channel 7 ignores the TYPE bit. */ - LM4_LPC_ADR(LPC_CH_COMX) = 0x2f8; + /* Set LPC channel 7 to COM port I/O address. Note that channel 7 + * ignores the TYPE bit and is always an 8-byte range. */ + LM4_LPC_ADR(LPC_CH_COMX) = LPC_COMX_ADDR; /* TODO: could configure IRQSELs and set IRQEN2/CX, and then the host * can enable IRQs on its own. */ LM4_LPC_CTL(LPC_CH_COMX) = 0x0004 | (LPC_POOL_OFFS_COMX << (5 - 1)); |