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author | Namyoon Woo <namyoon@google.com> | 2020-05-13 19:09:35 -0700 |
---|---|---|
committer | Commit Bot <commit-bot@chromium.org> | 2020-06-01 17:49:45 +0000 |
commit | 77f11cd9e99bc1d6a63acee45a3d457b7f205523 (patch) | |
tree | 801ab6fb0ad27213797a09026645d62d8c3708d4 /chip | |
parent | 5a60b3b215125e8d2c145e17867fcfaaae682dcd (diff) | |
download | chrome-ec-77f11cd9e99bc1d6a63acee45a3d457b7f205523.tar.gz |
Introduce TPM_BOARD_CFG register
This patch adds the TPM vendor-defined register, TPM_BOARD_CFG,
which indicates the board configuration status. This register is
attributed as one-time-programmable and the value is maintained
across deep sleeps. Cr50 allows a write on this register right after
a cr50 reset until it receives a TPM2_PCR_Extend command.
BUG=b:148691139
TEST=none
Signed-off-by: Namyoon Woo <namyoon@google.com>
Change-Id: I89ae5a53c15990ef78812aec5da81a59f04d7d98
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2202838
Tested-by: Namyoon Woo <namyoon@chromium.org>
Reviewed-by: Vadim Bendebury <vbendeb@chromium.org>
Commit-Queue: Namyoon Woo <namyoon@chromium.org>
Diffstat (limited to 'chip')
-rw-r--r-- | chip/g/init_chip.h | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/chip/g/init_chip.h b/chip/g/init_chip.h index a5c08cd3d9..488bb3cc4c 100644 --- a/chip/g/init_chip.h +++ b/chip/g/init_chip.h @@ -24,6 +24,7 @@ * SCRATCH18 - Preserving USB_DCFG through deep sleep * SCRATCH19 - Preserving USB data sequencing PID through deep sleep * SCRATCH20 - Preserving EC-EFS context + * SCRATCH21 - Preserving TPM_BOARD_CFG register * * PWRDN_SCRATCH 28 - 31 - Reserved for boot rom */ |