Revert "chip/mt_scp: disable uart irq in S3 state"

Reason for revert:
SCP still encounters WDT timeout after doing more
test. This patch doesn't solve the issue.

Original change's description:
> chip/mt_scp: disable uart irq in S3 state
>
> According to the latched PC/LR in a S3 watchdog timeout case,
> SCP is handling UART IRQ when watchdog timeout.
> Before find out the reason of triggering UART IRQ, disable UART IRQ in
> S3 state to prevent handling it. UART IRQ is enabled when resumed.
>
> BRANCH=None
> BUG=b:199444513
> TEST=SR test >4000 times on 5 devices.
>
> Change-Id: I06a4c31ecb9a82978bee8deb04315a11778253f0
> Signed-off-by: Tinghan Shen <tinghan.shen@mediatek.com>
> Reviewed-on:
https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3235729
> Tested-by: TingHan Shen
<tinghan.shen@mediatek.corp-partner.google.com>
> Reviewed-by: Tzung-Bi Shih <tzungbi@chromium.org>
> Commit-Queue: Tzung-Bi Shih <tzungbi@chromium.org>

BRANCH=None
BUG=b:199444513
TEST=make BOARD=cherry pass

Change-Id: Iffeb88dc21567dff82604d156d575a28df262d02
Signed-off-by: Tinghan Shen <tinghan.shen@mediatek.com>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3247733
Reviewed-by: Tzung-Bi Shih <tzungbi@chromium.org>
Reviewed-by: Rong Chang <rongchang@chromium.org>
Commit-Queue: Tzung-Bi Shih <tzungbi@chromium.org>

3 files changed, 2 insertions, 32 deletions

diff --git a/chip/mt_scp/mt8195/clock.c b/chip/mt_scp/mt8195/clock.c
index 797e1e175b..c6bf3cbc79 100644
--- a/chip/mt_scp/mt8195/clock.c
+++ b/chip/mt_scp/mt8195/clock.c
@@ -15,7 +15,6 @@
 #include "ec_commands.h"
 #include "power.h"
 #include "registers.h"
-#include "scp_uart.h"
 #include "timer.h"
 
 #define CPRINTF(format, args...) cprintf(CC_CLOCK, format, ##args)
@@ -378,12 +377,10 @@ power_chipset_handle_host_sleep_event(enum host_sleep_event state,
 {
 	if (state == HOST_SLEEP_EVENT_S3_SUSPEND) {
 		CPRINTS("AP suspend");
-		uart_disable_irq();
 		clock_select_clock(SCP_CLK_32K);
 	} else if (state == HOST_SLEEP_EVENT_S3_RESUME) {
-		clock_select_clock(SCP_CLK_ULPOSC2_HIGH_SPEED);
-		uart_enable_irq();
 		CPRINTS("AP resume");
+		clock_select_clock(SCP_CLK_ULPOSC2_HIGH_SPEED);
 	}
 }
 
diff --git a/chip/mt_scp/rv32i_common/scp_uart.h b/chip/mt_scp/rv32i_common/scp_uart.h
deleted file mode 100644
index 8d5c1da46e..0000000000
--- a/chip/mt_scp/rv32i_common/scp_uart.h
+++ /dev/null
@@ -1,13 +0,0 @@
-/* Copyright 2021 The Chromium OS Authors. All rights reserved.
- * Use of this source code is governed by a BSD-style license that can be
- * found in the LICENSE file.
- */
-
-#ifndef __SCP_UART_H
-#define __SCP_UART_H
-
-void uart_enable_irq(void);
-void uart_disable_irq(void);
-
-
-#endif /* __SCP_UART_H */
diff --git a/chip/mt_scp/rv32i_common/uart.c b/chip/mt_scp/rv32i_common/uart.c
index 4c3551d4cf..35b4003c9f 100644
--- a/chip/mt_scp/rv32i_common/uart.c
+++ b/chip/mt_scp/rv32i_common/uart.c
@@ -22,8 +22,6 @@
 
 static uint8_t init_done, tx_started;
 
-static uint32_t saved_uart_ier;
-
 void uart_init(void)
 {
 	const uint32_t baud_rate = CONFIG_UART_BAUD_RATE;
@@ -96,7 +94,7 @@ int uart_read_char(void)
 void uart_tx_start(void)
 {
 	tx_started = 1;
-	if ((UART_IER(UARTN) & UART_IER_THRI) || (saved_uart_ier != 0))
+	if (UART_IER(UARTN) & UART_IER_THRI)
 		return;
 	disable_sleep(SLEEP_MASK_UART);
 	UART_IER(UARTN) |= UART_IER_THRI;
@@ -120,18 +118,6 @@ void uart_tx_stop(void)
 	enable_sleep(SLEEP_MASK_UART);
 }
 
-void uart_disable_irq(void)
-{
-	saved_uart_ier = UART_IER(UARTN);
-	UART_IER(UARTN) = 0;
-}
-
-void uart_enable_irq(void)
-{
-	UART_IER(UARTN) = saved_uart_ier;
-	saved_uart_ier = 0;
-}
-
 static void uart_process(void)
 {
 	uart_process_input();