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| author | Furquan Shaikh <furquan@google.com> | 2018-03-02 12:06:20 -0800 |
|---|---|---|
| committer | chrome-bot <chrome-bot@chromium.org> | 2018-03-02 19:52:06 -0800 |
| commit | f32d92b7f5aa5e6951133bb7b893d264b1bb70e2 (patch) | |
| tree | a252d14c5a829c7171f9f1ec8abb13f796126170 /chip | |
| parent | 6589e15e424f6a56f370a89e322240a1375839c7 (diff) | |
| download | chrome-ec-f32d92b7f5aa5e6951133bb7b893d264b1bb70e2.tar.gz | |
npcx: Preserve default values of HW_WIRE
NPCX7 requires that the HW_WIRE bits 2-0 of VWEVSM2 register are set
so that the hardwire signals for SCI, SMI and RCIN are connected to VW
input of eSPI_SIF module. NPCX5 did this by default, however NPCX7 has
made it configurable.
NPCX7 however sets the HW_WIRE bits 2-0 to 1 at reset. So, this change
ensures that they are preserved while initializing VWEVSM2 registers
BUG=b:74111394
BRANCH=None
TEST=Verified that SCI works on glkrvp and meowth with NPCX7.
Change-Id: I9da6f45b4aa0b72b68db6192cb7567f09b072f0c
Signed-off-by: Furquan Shaikh <furquan@google.com>
Reviewed-on: https://chromium-review.googlesource.com/943801
Commit-Ready: Furquan Shaikh <furquan@chromium.org>
Tested-by: Divya S Sasidharan <divya.s.sasidharan@intel.com>
Reviewed-by: Aseda Aboagye <aaboagye@chromium.org>
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Reviewed-by: ML Chao <mlchao@nuvoton.corp-partner.google.com>
Reviewed-by: Jett Rink <jettrink@chromium.org>
Diffstat (limited to 'chip')
| -rw-r--r-- | chip/npcx/espi.c | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/chip/npcx/espi.c b/chip/npcx/espi.c index ae3e5fe735..6fc3e2b919 100644 --- a/chip/npcx/espi.c +++ b/chip/npcx/espi.c @@ -190,8 +190,8 @@ static void espi_vw_config_out(const struct vwevsm_config_t *config) index = VWEVSM_IDX_GET(NPCX_VWEVSM(i)); /* Set VW output register */ if (index == config->idx) { - /* Get Wire field */ - val = NPCX_VWEVSM(i) & 0x0F; + /* Preserve WIRE(3-0) and HW_WIRE (27-24). */ + val = NPCX_VWEVSM(i) & 0x0F00000F; val |= VWEVSM_FIELD(config->idx, config->idx_en, config->valid, |