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authorShawn Nematbakhsh <shawnn@chromium.org>2016-11-17 12:56:13 -0800
committerchrome-bot <chrome-bot@chromium.org>2016-11-18 20:07:08 -0800
commite97073a20dd489ad8c7e90cb2ca04bc9a05463f8 (patch)
treee37945083261c13736f26d061da3a694b6f948d5 /chip
parent7c6d8d40f135676f4a695a0a4ff3ca7ef926450a (diff)
downloadchrome-ec-e97073a20dd489ad8c7e90cb2ca04bc9a05463f8.tar.gz
clock: Fix clock_wait_cycles() asm
The 'cycles' register will be clobbered by our macro, so it must be specified as an output operand that may also be used as input. BUG=chrome-os-partner:60000 BRANCH=gru,strago,glados TEST=Build + burn wheatley, verify alignment exception is not encountered on boot. Also verify produced assembly is still correct: 100a89a6: 2303 movs r3, #3 100a89a8: 3b01 subs r3, #1 100a89aa: d1fd bne.n 100a89a8 Signed-off-by: Shawn Nematbakhsh <shawnn@chromium.org> Change-Id: I1be03a006967aed6970dbac5d98a19a31e0b7d49 Reviewed-on: https://chromium-review.googlesource.com/412441 Commit-Ready: Shawn N <shawnn@chromium.org> Tested-by: Mulin Chao <mlchao@nuvoton.com> Tested-by: Shawn N <shawnn@chromium.org> Reviewed-by: Randall Spangler <rspangler@chromium.org> Reviewed-by: Mulin Chao <mlchao@nuvoton.com> Reviewed-by: Vincent Palatin <vpalatin@chromium.org>
Diffstat (limited to 'chip')
-rw-r--r--chip/lm4/clock.c4
-rw-r--r--chip/mec1322/clock.c4
-rw-r--r--chip/npcx/clock.c4
3 files changed, 6 insertions, 6 deletions
diff --git a/chip/lm4/clock.c b/chip/lm4/clock.c
index bc4b865403..99c83422f7 100644
--- a/chip/lm4/clock.c
+++ b/chip/lm4/clock.c
@@ -140,8 +140,8 @@ void clock_enable_pll(int enable, int notify)
void clock_wait_cycles(uint32_t cycles)
{
- asm("1: subs %0, #1\n"
- " bne 1b\n" :: "r"(cycles));
+ asm volatile("1: subs %0, #1\n"
+ " bne 1b\n" : "+r"(cycles));
}
int clock_get_freq(void)
diff --git a/chip/mec1322/clock.c b/chip/mec1322/clock.c
index c305b16ffc..d86f1bc5a7 100644
--- a/chip/mec1322/clock.c
+++ b/chip/mec1322/clock.c
@@ -49,8 +49,8 @@ static int freq = 48000000;
void clock_wait_cycles(uint32_t cycles)
{
- asm("1: subs %0, #1\n"
- " bne 1b\n" :: "r"(cycles));
+ asm volatile("1: subs %0, #1\n"
+ " bne 1b\n" : "+r"(cycles));
}
int clock_get_freq(void)
diff --git a/chip/npcx/clock.c b/chip/npcx/clock.c
index 196248c592..34a9b6a726 100644
--- a/chip/npcx/clock.c
+++ b/chip/npcx/clock.c
@@ -227,8 +227,8 @@ int clock_get_apb2_freq(void)
*/
void clock_wait_cycles(uint32_t cycles)
{
- asm("1: subs %0, #1\n"
- " bne 1b\n" : : "r"(cycles));
+ asm volatile("1: subs %0, #1\n"
+ " bne 1b\n" : "+r"(cycles));
}
#ifdef CONFIG_LOW_POWER_IDLE