stm32: Add CHIP_FAMILY defines

Previously, code which needed to work on all STM32F platforms needed
to specify them by name (CHIP_VARIANT_stm32f100 ||
CHIP_VARIANT_stm32f10x), and we needed extra symlinks in the
chip/stm32/ directory to allow the build system to find
family-specific files.

Add a CHIP_FAMILY level of abstraction, so that things which are
common across all STM32F platforms don't need to specify every STM32F
variant.  Make the chip build look for family-specific filenames
instead of variant-specific filenames (except for config*.h, which is
actually variant specific).

In the few places where things actually are variant-specific, keep
using the existing CHIP_VARIANT defines.

Code refactoring only; no functional changes.

BUG=chrome-os-partner:20567
BRANCH=none
TEST=build all platforms

Change-Id: I1da831aadabf8b8dd9dfde423cac13c9f43eb953
Signed-off-by: Randall Spangler <rspangler@chromium.org>
Reviewed-on: https://gerrit.chromium.org/gerrit/60247
Reviewed-by: David Hendricks <dhendrix@chromium.org>
Reviewed-by: Vic Yang <victoryang@chromium.org>
Reviewed-by: Simon Glass <sjg@chromium.org>

20 files changed, 22 insertions, 27 deletions

diff --git a/chip/stm32/build.mk b/chip/stm32/build.mk
index b45f6b6929..24ae387ca7 100644
--- a/chip/stm32/build.mk
+++ b/chip/stm32/build.mk
@@ -10,11 +10,11 @@
 CORE:=cortex-m
 
 chip-y=dma.o hwtimer.o system.o uart.o
-chip-y+=jtag-$(CHIP_VARIANT).o clock-$(CHIP_VARIANT).o gpio-$(CHIP_VARIANT).o
+chip-y+=jtag-$(CHIP_FAMILY).o clock-$(CHIP_FAMILY).o gpio-$(CHIP_FAMILY).o
 chip-$(CONFIG_SPI)+=spi.o
-chip-$(CONFIG_I2C)+=i2c-$(CHIP_VARIANT).o
+chip-$(CONFIG_I2C)+=i2c-$(CHIP_FAMILY).o
 chip-$(CONFIG_WATCHDOG)+=watchdog.o
 chip-$(HAS_TASK_KEYSCAN)+=keyboard_raw.o
 chip-$(HAS_TASK_POWERLED)+=power_led.o
-chip-$(CONFIG_FLASH)+=flash-$(CHIP_VARIANT).o
+chip-$(CONFIG_FLASH)+=flash-$(CHIP_FAMILY).o
 chip-$(CONFIG_ADC)+=adc.o
diff --git a/chip/stm32/clock-stm32f100.c b/chip/stm32/clock-stm32f.c
index e878d7856d..e878d7856d 100644
--- a/chip/stm32/clock-stm32f100.c
+++ b/chip/stm32/clock-stm32f.c
diff --git a/chip/stm32/clock-stm32f10x.c b/chip/stm32/clock-stm32f10x.c
deleted file mode 120000
index 4abd363cde..0000000000
--- a/chip/stm32/clock-stm32f10x.c
+++ /dev/null
@@ -1 +0,0 @@
-clock-stm32f100.c
\ No newline at end of file
diff --git a/chip/stm32/clock-stm32l15x.c b/chip/stm32/clock-stm32l.c
index 79b618363f..79b618363f 100644
--- a/chip/stm32/clock-stm32l15x.c
+++ b/chip/stm32/clock-stm32l.c
diff --git a/chip/stm32/flash-stm32f100.c b/chip/stm32/flash-stm32f.c
index c0f5ae4cd3..c0f5ae4cd3 100644
--- a/chip/stm32/flash-stm32f100.c
+++ b/chip/stm32/flash-stm32f.c
diff --git a/chip/stm32/flash-stm32f10x.c b/chip/stm32/flash-stm32f10x.c
deleted file mode 120000
index e9df79b196..0000000000
--- a/chip/stm32/flash-stm32f10x.c
+++ /dev/null
@@ -1 +0,0 @@
-flash-stm32f100.c
\ No newline at end of file
diff --git a/chip/stm32/flash-stm32l15x.c b/chip/stm32/flash-stm32l.c
index afb614b921..afb614b921 100644
--- a/chip/stm32/flash-stm32l15x.c
+++ b/chip/stm32/flash-stm32l.c
diff --git a/chip/stm32/gpio-stm32f100.c b/chip/stm32/gpio-stm32f.c
index fdc2ff2549..fdc2ff2549 100644
--- a/chip/stm32/gpio-stm32f100.c
+++ b/chip/stm32/gpio-stm32f.c
diff --git a/chip/stm32/gpio-stm32f10x.c b/chip/stm32/gpio-stm32f10x.c
deleted file mode 120000
index 8e60b73de0..0000000000
--- a/chip/stm32/gpio-stm32f10x.c
+++ /dev/null
@@ -1 +0,0 @@
-gpio-stm32f100.c
\ No newline at end of file
diff --git a/chip/stm32/gpio-stm32l15x.c b/chip/stm32/gpio-stm32l.c
index 8f7a0fc5f0..8f7a0fc5f0 100644
--- a/chip/stm32/gpio-stm32l15x.c
+++ b/chip/stm32/gpio-stm32l.c
diff --git a/chip/stm32/hwtimer.c b/chip/stm32/hwtimer.c
index 8067843734..5957e0e974 100644
--- a/chip/stm32/hwtimer.c
+++ b/chip/stm32/hwtimer.c
@@ -165,12 +165,12 @@ void __hw_timer_enable_clock(int n, int enable)
 	volatile uint32_t *reg;
 	uint32_t mask = 0;
 
-#if defined(CHIP_VARIANT_stm32f100) || defined(CHIP_VARIANT_stm32f10x)
+#if defined(CHIP_FAMILY_stm32f)
 	if (n == 1) {
 		reg = &STM32_RCC_APB2ENR;
 		mask = 1 << 11;
 	}
-#elif defined(CHIP_VARIANT_stm32l15x)
+#elif defined(CHIP_FAMILY_stm32l)
 	if (n >= 9 && n <= 11) {
 		reg = &STM32_RCC_APB2ENR;
 		mask = 1 << (n - 7);
diff --git a/chip/stm32/i2c-stm32f100.c b/chip/stm32/i2c-stm32f.c
index 3cdcbe84fd..3cdcbe84fd 100644
--- a/chip/stm32/i2c-stm32f100.c
+++ b/chip/stm32/i2c-stm32f.c
diff --git a/chip/stm32/i2c-stm32f10x.c b/chip/stm32/i2c-stm32f10x.c
deleted file mode 120000
index 26f2e35b1b..0000000000
--- a/chip/stm32/i2c-stm32f10x.c
+++ /dev/null
@@ -1 +0,0 @@
-i2c-stm32f100.c
\ No newline at end of file
diff --git a/chip/stm32/i2c-stm32l15x.c b/chip/stm32/i2c-stm32l.c
index 36f6817815..36f6817815 100644
--- a/chip/stm32/i2c-stm32l15x.c
+++ b/chip/stm32/i2c-stm32l.c
diff --git a/chip/stm32/jtag-stm32f100.c b/chip/stm32/jtag-stm32f.c
index 9d55fdb906..9d55fdb906 100644
--- a/chip/stm32/jtag-stm32f100.c
+++ b/chip/stm32/jtag-stm32f.c
diff --git a/chip/stm32/jtag-stm32f10x.c b/chip/stm32/jtag-stm32f10x.c
deleted file mode 120000
index 64c8bc10d7..0000000000
--- a/chip/stm32/jtag-stm32f10x.c
+++ /dev/null
@@ -1 +0,0 @@
-jtag-stm32f100.c
\ No newline at end of file
diff --git a/chip/stm32/jtag-stm32l15x.c b/chip/stm32/jtag-stm32l.c
index 71e5f711e2..71e5f711e2 100644
--- a/chip/stm32/jtag-stm32l15x.c
+++ b/chip/stm32/jtag-stm32l.c
diff --git a/chip/stm32/registers.h b/chip/stm32/registers.h
index f4f054b99e..6a1f63ac09 100644
--- a/chip/stm32/registers.h
+++ b/chip/stm32/registers.h
@@ -133,7 +133,7 @@
 #define STM32_TIM6_BASE            0x40001000
 #define STM32_TIM7_BASE            0x40001400
 #define STM32_TIM8_BASE            0x40013400 /* STM32F10x only */
-#if defined(CHIP_VARIANT_stm32l15x)
+#if defined(CHIP_FAMILY_stm32l)
 #define STM32_TIM9_BASE            0x40010800 /* STM32L15X only */
 #define STM32_TIM10_BASE           0x40010C00 /* STM32L15X only */
 #define STM32_TIM11_BASE           0x40011000 /* STM32L15X only */
@@ -216,7 +216,7 @@ typedef volatile struct timer_ctlr timer_ctlr_t;
 #define GPIO_G                       STM32_GPIOG_BASE
 #define GPIO_H                       STM32_GPIOH_BASE
 
-#if defined(CHIP_VARIANT_stm32l15x)
+#if defined(CHIP_FAMILY_stm32l)
 #define STM32_GPIOA_BASE            0x40020000
 #define STM32_GPIOB_BASE            0x40020400
 #define STM32_GPIOC_BASE            0x40020800
@@ -247,7 +247,7 @@ typedef volatile struct timer_ctlr timer_ctlr_t;
 #define GPIO_ALT_RI                  0xE
 #define GPIO_ALT_EVENTOUT            0xF
 
-#elif defined(CHIP_VARIANT_stm32f100) || defined(CHIP_VARIANT_stm32f10x)
+#elif defined(CHIP_FAMILY_stm32f)
 #define STM32_GPIOA_BASE            0x40010800
 #define STM32_GPIOB_BASE            0x40010c00
 #define STM32_GPIOC_BASE            0x40011000
@@ -319,7 +319,7 @@ typedef volatile struct timer_ctlr timer_ctlr_t;
 #define STM32_PWR_CR_LPSDSR		(1 << 0)
 #define STM32_PWR_CSR               REG32(STM32_PWR_BASE + 0x04)
 
-#if defined(CHIP_VARIANT_stm32l15x)
+#if defined(CHIP_FAMILY_stm32l)
 #define STM32_RCC_BASE              0x40023800
 
 #define STM32_RCC_CR                REG32(STM32_RCC_BASE + 0x00)
@@ -354,7 +354,7 @@ typedef volatile struct timer_ctlr timer_ctlr_t;
 #define STM32_SYSCFG_PMC            REG32(STM32_SYSCFG_BASE + 0x04)
 #define STM32_SYSCFG_EXTICR(n)      REG32(STM32_SYSCFG_BASE + 8 + 4 * (n))
 
-#elif defined(CHIP_VARIANT_stm32f100) || defined(CHIP_VARIANT_stm32f10x)
+#elif defined(CHIP_FAMILY_stm32f)
 #define STM32_RCC_BASE              0x40021000
 
 #define STM32_RCC_CR                REG32(STM32_RCC_BASE + 0x00)
@@ -405,7 +405,7 @@ typedef volatile struct timer_ctlr timer_ctlr_t;
 
 #define STM32_RTC_BASE              0x40002800
 
-#if defined(CHIP_VARIANT_stm32l15x)
+#if defined(CHIP_FAMILY_stm32l)
 #define STM32_RTC_TR                REG32(STM32_RTC_BASE + 0x00)
 #define STM32_RTC_DR                REG32(STM32_RTC_BASE + 0x04)
 #define STM32_RTC_CR                REG32(STM32_RTC_BASE + 0x08)
@@ -424,7 +424,7 @@ typedef volatile struct timer_ctlr timer_ctlr_t;
 #define STM32_BKP_DATA(n)           STM32_RTC_BACKUP(n)
 #define STM32_BKP_ENTRIES           20
 
-#elif defined(CHIP_VARIANT_stm32f100) || defined(CHIP_VARIANT_stm32f10x)
+#elif defined(CHIP_FAMILY_stm32f)
 #define STM32_RTC_CRH               REG32(STM32_RTC_BASE + 0x00)
 #define STM32_RTC_CRL               REG32(STM32_RTC_BASE + 0x04)
 #define STM32_RTC_PRLH              REG32(STM32_RTC_BASE + 0x08)
@@ -501,7 +501,7 @@ typedef volatile struct stm32_spi_regs stm32_spi_regs_t;
 
 /* --- Flash --- */
 
-#if defined(CHIP_VARIANT_stm32l15x)
+#if defined(CHIP_FAMILY_stm32l)
 #define STM32_FLASH_REGS_BASE       0x40023c00
 
 #define STM32_FLASH_ACR             REG32(STM32_FLASH_REGS_BASE + 0x00)
@@ -540,7 +540,7 @@ typedef volatile struct stm32_spi_regs stm32_spi_regs_t;
 #define STM32_OPTB_WRP3L            0x18
 #define STM32_OPTB_WRP3H            0x1c
 
-#elif defined(CHIP_VARIANT_stm32f100) || defined(CHIP_VARIANT_stm32f10x)
+#elif defined(CHIP_FAMILY_stm32f)
 #define STM32_FLASH_REGS_BASE       0x40022000
 
 #define STM32_FLASH_ACR             REG32(STM32_FLASH_REGS_BASE + 0x00)
@@ -601,9 +601,9 @@ typedef volatile struct stm32_spi_regs stm32_spi_regs_t;
 
 /* --- DMA --- */
 
-#if defined(CHIP_VARIANT_stm32l15x)
+#if defined(CHIP_FAMILY_stm32l)
 #define STM32_DMA1_BASE             0x40026000
-#elif defined(CHIP_VARIANT_stm32f100) || defined(CHIP_VARIANT_stm32f10x)
+#elif defined(CHIP_FAMILY_stm32f)
 #define STM32_DMA1_BASE             0x40020000
 #else
 #error Unsupported chip variant
diff --git a/chip/stm32/system.c b/chip/stm32/system.c
index 0530624b06..746cbd8001 100644
--- a/chip/stm32/system.c
+++ b/chip/stm32/system.c
@@ -151,14 +151,14 @@ void system_pre_init(void)
 	while (!(STM32_RCC_CSR & (1 << 1)))
 		;
 	/* re-configure RTC if needed */
-#if defined(CHIP_VARIANT_stm32l15x)
+#ifdef CHIP_FAMILY_stm32l
 	if ((STM32_RCC_CSR & 0x00C30000) != 0x00420000) {
 		/* the RTC settings are bad, we need to reset it */
 		STM32_RCC_CSR |= 0x00800000;
 		/* Enable RTC and use LSI as clock source */
 		STM32_RCC_CSR = (STM32_RCC_CSR & ~0x00C30000) | 0x00420000;
 	}
-#elif defined(CHIP_VARIANT_stm32f100) || defined(CHIP_VARIANT_stm32f10x)
+#elif defined(CHIP_FAMILY_stm32f)
 	if ((STM32_RCC_BDCR & 0x00018300) != 0x00008200) {
 		/* the RTC settings are bad, we need to reset it */
 		STM32_RCC_BDCR |= 0x00010000;
@@ -166,7 +166,7 @@ void system_pre_init(void)
 		STM32_RCC_BDCR = (STM32_RCC_BDCR & ~0x00018300) | 0x00008200;
 	}
 #else
-#error "Unsupported chip variant"
+#error "Unsupported chip family"
 #endif
 
 	check_reset_cause();
@@ -203,7 +203,7 @@ void system_reset(int flags)
 
 	if (flags & SYSTEM_RESET_HARD) {
 
-#ifdef CHIP_VARIANT_stm32l15x
+#ifdef CHIP_FAMILY_stm32l
 		/*
 		 * Ask the flash module to reboot, so that we reload the
 		 * option bytes.
diff --git a/chip/stm32/uart.c b/chip/stm32/uart.c
index b4770edff8..cade7542f8 100644
--- a/chip/stm32/uart.c
+++ b/chip/stm32/uart.c
@@ -118,7 +118,7 @@ static void uart_freq_change(void)
 {
 	int div = DIV_ROUND_NEAREST(clock_get_freq(), CONFIG_UART_BAUD_RATE);
 
-#ifdef CHIP_VARIANT_stm32l15x
+#ifdef CHIP_FAMILY_stm32l
 	if (div / 16 > 0) {
 		/*
 		 * CPU clock is high enough to support x16 oversampling.
@@ -165,7 +165,7 @@ void uart_init(void)
 	/* DMA disabled, special modes disabled, error interrupt disabled */
 	STM32_USART_CR3(UARTN) = 0x0000;
 
-#ifdef CHIP_VARIANT_stm32l15x
+#ifdef CHIP_FAMILY_stm32l
 	/* Use single-bit sampling */
 	STM32_USART_CR3(UARTN) |= STM32_USART_CR3_ONEBIT;
 #endif