diff options
| author | Dino Li <Dino.Li@ite.com.tw> | 2020-04-17 15:51:43 +0800 |
|---|---|---|
| committer | Commit Bot <commit-bot@chromium.org> | 2020-04-20 05:56:05 +0000 |
| commit | e1ce7b0c3d285cf7f228fb0db4d7e2bafca0c24a (patch) | |
| tree | 5a988e1144e9359aba126d08c56c4b27efe6edf3 /chip | |
| parent | 735e4f99cc17dde97dda06d90b3ea4dd10a0146a (diff) | |
| download | chrome-ec-e1ce7b0c3d285cf7f228fb0db4d7e2bafca0c24a.tar.gz | |
it81202/it81302: set GPIOH7 as output low at default
On IT81202/IT81302, the GPIOH7 isn't bonding with pad and is left
floating internally.
We need to enable internal pull-down for the pin to prevent
leakage current, but IT81202/IT81302 doesn't have the capability
to pull it down.
We can only set it as output low, so we enable output low for it
at initialization to prevent leakage.
BUG=none
BRANCH=none
TEST=On it81202 EVB, power consumption is reduced by ~70uA.
Signed-off-by: Dino Li <Dino.Li@ite.com.tw>
Change-Id: Iba1f5af684e31cad192b4e9ee5b099e7c51a71a3
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2147761
Reviewed-by: Jett Rink <jettrink@chromium.org>
Diffstat (limited to 'chip')
| -rw-r--r-- | chip/it83xx/config_chip_it8xxx2.h | 2 | ||||
| -rw-r--r-- | chip/it83xx/gpio.c | 12 |
2 files changed, 14 insertions, 0 deletions
diff --git a/chip/it83xx/config_chip_it8xxx2.h b/chip/it83xx/config_chip_it8xxx2.h index ac010fca41..d2a54eac47 100644 --- a/chip/it83xx/config_chip_it8xxx2.h +++ b/chip/it83xx/config_chip_it8xxx2.h @@ -107,6 +107,8 @@ /* Pins of group K and L are set as internal pull-down at initialization. */ #define IT83XX_GPIO_GROUP_K_L_DEFAULT_PULL_DOWN #endif +/* GPIOH7 is set as output low at initialization. */ +#define IT83XX_GPIO_H7_DEFAULT_OUTPUT_LOW /* All GPIOs support interrupt on rising, falling, and either edge. */ #define IT83XX_GPIO_INT_FLEXIBLE /* Enable detect type-c plug in interrupt. */ diff --git a/chip/it83xx/gpio.c b/chip/it83xx/gpio.c index 4fa062a848..89f5f36500 100644 --- a/chip/it83xx/gpio.c +++ b/chip/it83xx/gpio.c @@ -725,6 +725,18 @@ void gpio_pre_init(void) } } + /* + * On IT81202/IT81302, the GPIOH7 isn't bonding with pad and is left + * floating internally. We need to enable internal pull-down for the pin + * to prevent leakage current, but IT81202/IT81302 doesn't have the + * capability to pull it down. We can only set it as output low, + * so we enable output low for it at initialization to prevent leakage. + */ + if (IS_ENABLED(IT83XX_GPIO_H7_DEFAULT_OUTPUT_LOW)) { + IT83XX_GPIO_CTRL(GPIO_H, 7) = GPCR_PORT_PIN_MODE_OUTPUT; + IT83XX_GPIO_DATA(GPIO_H) &= ~BIT(7); + } + for (i = 0; i < GPIO_COUNT; i++, g++) { flags = g->flags; |