summaryrefslogtreecommitdiff
path: root/chip
diff options
context:
space:
mode:
authorTim Lin <tim2.lin@ite.corp-partner.google.com>2021-06-04 14:11:25 +0800
committerCommit Bot <commit-bot@chromium.org>2021-06-09 18:54:47 +0000
commit670bd7e258d352a2ea197e055e46b60690935afc (patch)
tree9a223dbbdde5e822f63475fdb0a39c0dc1300112 /chip
parent3bf7cf9dfe738f1f156d6b9dc5ade87290d1d78e (diff)
downloadchrome-ec-670bd7e258d352a2ea197e055e46b60690935afc.tar.gz
include/flash: rename the APIs
The names conflict when enabling both Zephyr's flash driver and CONFIG_FLASH_CROS option. Rename all the APIs in include/flash.h BUG=b:187192628 BRANCH=none TEST=make buildall -j4 Signed-off-by: Tim Lin <tim2.lin@ite.corp-partner.google.com> Change-Id: If1fd0ea28fa9f5cec1c1daa8f72f63eb7a0e6500 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2931749 Commit-Queue: Keith Short <keithshort@chromium.org> Reviewed-by: Keith Short <keithshort@chromium.org> Reviewed-by: Denis Brockus <dbrockus@chromium.org>
Diffstat (limited to 'chip')
-rw-r--r--chip/host/flash.c22
-rw-r--r--chip/ish/flash.c2
-rw-r--r--chip/it83xx/flash.c25
-rw-r--r--chip/it83xx/system.c4
-rw-r--r--chip/lm4/flash.c24
-rw-r--r--chip/max32660/flash_chip.c32
-rw-r--r--chip/mchp/flash.c24
-rw-r--r--chip/mec1322/flash.c24
-rw-r--r--chip/npcx/flash.c56
-rw-r--r--chip/stm32/flash-f.c39
-rw-r--r--chip/stm32/flash-stm32f0.c12
-rw-r--r--chip/stm32/flash-stm32f3.c12
-rw-r--r--chip/stm32/flash-stm32g4-l4.c34
-rw-r--r--chip/stm32/flash-stm32h7.c30
-rw-r--r--chip/stm32/flash-stm32l.c30
-rw-r--r--chip/stm32/otp-stm32f4.c12
-rw-r--r--chip/stm32/system.c2
17 files changed, 195 insertions, 189 deletions
diff --git a/chip/host/flash.c b/chip/host/flash.c
index 95d46d9f34..75212737e0 100644
--- a/chip/host/flash.c
+++ b/chip/host/flash.c
@@ -67,7 +67,7 @@ static void flash_get_persistent(void)
release_persistent_storage(f);
}
-int flash_physical_write(int offset, int size, const char *data)
+int crec_flash_physical_write(int offset, int size, const char *data)
{
ASSERT((size & (CONFIG_FLASH_WRITE_SIZE - 1)) == 0);
@@ -83,7 +83,7 @@ int flash_physical_write(int offset, int size, const char *data)
return EC_SUCCESS;
}
-int flash_physical_erase(int offset, int size)
+int crec_flash_physical_erase(int offset, int size)
{
ASSERT((size & (CONFIG_FLASH_ERASE_SIZE - 1)) == 0);
@@ -99,12 +99,12 @@ int flash_physical_erase(int offset, int size)
return EC_SUCCESS;
}
-int flash_physical_get_protect(int bank)
+int crec_flash_physical_get_protect(int bank)
{
return __host_flash_protect[bank];
}
-uint32_t flash_physical_get_protect_flags(void)
+uint32_t crec_flash_physical_get_protect_flags(void)
{
int i;
uint32_t flags = EC_FLASH_PROTECT_ALL_NOW;
@@ -116,20 +116,20 @@ uint32_t flash_physical_get_protect_flags(void)
return flags;
}
-int flash_physical_protect_now(int all)
+int crec_flash_physical_protect_now(int all)
{
memset(__host_flash_protect, 1, all ? PHYSICAL_BANKS : WP_BANK_COUNT);
return EC_SUCCESS;
}
-uint32_t flash_physical_get_valid_flags(void)
+uint32_t crec_flash_physical_get_valid_flags(void)
{
return EC_FLASH_PROTECT_RO_AT_BOOT |
EC_FLASH_PROTECT_RO_NOW |
EC_FLASH_PROTECT_ALL_NOW;
}
-uint32_t flash_physical_get_writable_flags(uint32_t cur_flags)
+uint32_t crec_flash_physical_get_writable_flags(uint32_t cur_flags)
{
uint32_t ret = 0;
@@ -148,13 +148,13 @@ uint32_t flash_physical_get_writable_flags(uint32_t cur_flags)
return ret;
}
-int flash_pre_init(void)
+int crec_flash_pre_init(void)
{
uint32_t prot_flags;
flash_get_persistent();
- prot_flags = flash_get_protect();
+ prot_flags = crec_flash_get_protect();
if (prot_flags & EC_FLASH_PROTECT_GPIO_ASSERTED) {
/*
@@ -163,13 +163,13 @@ int flash_pre_init(void)
*/
if ((prot_flags & EC_FLASH_PROTECT_RO_AT_BOOT) &&
!(prot_flags & EC_FLASH_PROTECT_RO_NOW)) {
- int rv = flash_set_protect(EC_FLASH_PROTECT_RO_NOW,
+ int rv = crec_flash_set_protect(EC_FLASH_PROTECT_RO_NOW,
EC_FLASH_PROTECT_RO_NOW);
if (rv)
return rv;
/* Re-read flags */
- prot_flags = flash_get_protect();
+ prot_flags = crec_flash_get_protect();
}
}
diff --git a/chip/ish/flash.c b/chip/ish/flash.c
index 8ef4d1a73c..2a1b9c0793 100644
--- a/chip/ish/flash.c
+++ b/chip/ish/flash.c
@@ -12,7 +12,7 @@
*
* Applies at-boot protection settings if necessary.
*/
-int flash_pre_init(void)
+int crec_flash_pre_init(void)
{
return EC_SUCCESS;
}
diff --git a/chip/it83xx/flash.c b/chip/it83xx/flash.c
index aa1e280159..46a833afdb 100644
--- a/chip/it83xx/flash.c
+++ b/chip/it83xx/flash.c
@@ -411,7 +411,7 @@ static void flash_protect_banks(int start_bank,
}
}
-int FLASH_DMA_CODE flash_physical_read(int offset, int size, char *data)
+int FLASH_DMA_CODE crec_flash_physical_read(int offset, int size, char *data)
{
int i;
@@ -432,7 +432,8 @@ int FLASH_DMA_CODE flash_physical_read(int offset, int size, char *data)
* @param size Number of bytes to write.
* @param data Data to write to flash. Must be 32-bit aligned.
*/
-int FLASH_DMA_CODE flash_physical_write(int offset, int size, const char *data)
+int FLASH_DMA_CODE crec_flash_physical_write(int offset, int size,
+ const char *data)
{
int ret = EC_ERROR_UNKNOWN;
@@ -479,7 +480,7 @@ int FLASH_DMA_CODE flash_physical_write(int offset, int size, const char *data)
* @param offset Flash offset to erase.
* @param size Number of bytes to erase.
*/
-int FLASH_DMA_CODE flash_physical_erase(int offset, int size)
+int FLASH_DMA_CODE crec_flash_physical_erase(int offset, int size)
{
int v_size = size, v_addr = offset, ret = EC_ERROR_UNKNOWN;
@@ -539,7 +540,7 @@ int FLASH_DMA_CODE flash_physical_erase(int offset, int size)
* @param bank Bank index to check.
* @return non-zero if bank is protected until reboot.
*/
-int flash_physical_get_protect(int bank)
+int crec_flash_physical_get_protect(int bank)
{
return IT83XX_GCTRL_EWPR0PFEC(FWP_REG(bank)) & FWP_MASK(bank);
}
@@ -550,7 +551,7 @@ int flash_physical_get_protect(int bank)
* @param all Protect all (=1) or just read-only and pstate (=0).
* @return non-zero if error.
*/
-int flash_physical_protect_now(int all)
+int crec_flash_physical_protect_now(int all)
{
if (all) {
/* Protect the entire flash */
@@ -584,7 +585,7 @@ int flash_physical_protect_now(int all)
*
* Uses the EC_FLASH_PROTECT_* flags from ec_commands.h
*/
-uint32_t flash_physical_get_protect_flags(void)
+uint32_t crec_flash_physical_get_protect_flags(void)
{
uint32_t flags = 0;
@@ -609,7 +610,7 @@ uint32_t flash_physical_get_protect_flags(void)
*
* @return A combination of EC_FLASH_PROTECT_* flags from ec_commands.h
*/
-uint32_t flash_physical_get_valid_flags(void)
+uint32_t crec_flash_physical_get_valid_flags(void)
{
return EC_FLASH_PROTECT_RO_AT_BOOT |
EC_FLASH_PROTECT_RO_NOW |
@@ -622,7 +623,7 @@ uint32_t flash_physical_get_valid_flags(void)
* @param cur_flags The current flash protect flags.
* @return A combination of EC_FLASH_PROTECT_* flags from ec_commands.h
*/
-uint32_t flash_physical_get_writable_flags(uint32_t cur_flags)
+uint32_t crec_flash_physical_get_writable_flags(uint32_t cur_flags)
{
uint32_t ret = 0;
@@ -726,7 +727,7 @@ static void flash_code_static_dma(void)
*
* Applies at-boot protection settings if necessary.
*/
-int flash_pre_init(void)
+int crec_flash_pre_init(void)
{
int32_t reset_flags, prot_flags, unwanted_prot_flags;
@@ -742,7 +743,7 @@ int flash_pre_init(void)
flash_enable_second_ilm();
reset_flags = system_get_reset_flags();
- prot_flags = flash_get_protect();
+ prot_flags = crec_flash_get_protect();
unwanted_prot_flags = EC_FLASH_PROTECT_ALL_NOW |
EC_FLASH_PROTECT_ERROR_INCONSISTENT;
@@ -768,13 +769,13 @@ int flash_pre_init(void)
*/
if ((prot_flags & EC_FLASH_PROTECT_RO_AT_BOOT) &&
!(prot_flags & EC_FLASH_PROTECT_RO_NOW)) {
- int rv = flash_set_protect(EC_FLASH_PROTECT_RO_NOW,
+ int rv = crec_flash_set_protect(EC_FLASH_PROTECT_RO_NOW,
EC_FLASH_PROTECT_RO_NOW);
if (rv)
return rv;
/* Re-read flags */
- prot_flags = flash_get_protect();
+ prot_flags = crec_flash_get_protect();
}
} else {
/* Don't want RO flash protected */
diff --git a/chip/it83xx/system.c b/chip/it83xx/system.c
index 7281977e44..a85cbe7c0f 100644
--- a/chip/it83xx/system.c
+++ b/chip/it83xx/system.c
@@ -312,9 +312,9 @@ void system_reset(int flags)
#if defined(CONFIG_PRESERVE_LOGS) && defined(CONFIG_IT83XX_HARD_RESET_BY_GPG1)
/* Saving EC logs into flash before reset. */
- flash_physical_erase(CHIP_FLASH_PRESERVE_LOGS_BASE,
+ crec_flash_physical_erase(CHIP_FLASH_PRESERVE_LOGS_BASE,
CHIP_FLASH_PRESERVE_LOGS_SIZE);
- flash_physical_write(CHIP_FLASH_PRESERVE_LOGS_BASE,
+ crec_flash_physical_write(CHIP_FLASH_PRESERVE_LOGS_BASE,
(uintptr_t)__preserved_logs_size, __preserved_logs_start);
BRAM_EC_LOG_STATUS = EC_LOG_SAVED_IN_FLASH;
#endif
diff --git a/chip/lm4/flash.c b/chip/lm4/flash.c
index 5e0c6510f3..5b61874984 100644
--- a/chip/lm4/flash.c
+++ b/chip/lm4/flash.c
@@ -87,7 +87,7 @@ static int write_buffer(void)
/*****************************************************************************/
/* Physical layer APIs */
-int flash_physical_write(int offset, int size, const char *data)
+int crec_flash_physical_write(int offset, int size, const char *data)
{
const uint32_t *data32 = (const uint32_t *)data;
int rv;
@@ -125,7 +125,7 @@ int flash_physical_write(int offset, int size, const char *data)
return EC_SUCCESS;
}
-int flash_physical_erase(int offset, int size)
+int crec_flash_physical_erase(int offset, int size)
{
if (all_protected)
return EC_ERROR_ACCESS_DENIED;
@@ -137,7 +137,7 @@ int flash_physical_erase(int offset, int size)
int t;
/* Do nothing if already erased */
- if (flash_is_erased(offset, CONFIG_FLASH_ERASE_SIZE))
+ if (crec_flash_is_erased(offset, CONFIG_FLASH_ERASE_SIZE))
continue;
LM4_FLASH_FMA = offset;
@@ -168,12 +168,12 @@ int flash_physical_erase(int offset, int size)
return EC_SUCCESS;
}
-int flash_physical_get_protect(int bank)
+int crec_flash_physical_get_protect(int bank)
{
return (LM4_FLASH_FMPPE[F_BANK(bank)] & F_BIT(bank)) ? 0 : 1;
}
-uint32_t flash_physical_get_protect_flags(void)
+uint32_t crec_flash_physical_get_protect_flags(void)
{
uint32_t flags = 0;
@@ -188,7 +188,7 @@ uint32_t flash_physical_get_protect_flags(void)
return flags;
}
-int flash_physical_protect_now(int all)
+int crec_flash_physical_protect_now(int all)
{
if (all) {
/* Protect the entire flash */
@@ -202,14 +202,14 @@ int flash_physical_protect_now(int all)
return EC_SUCCESS;
}
-uint32_t flash_physical_get_valid_flags(void)
+uint32_t crec_flash_physical_get_valid_flags(void)
{
return EC_FLASH_PROTECT_RO_AT_BOOT |
EC_FLASH_PROTECT_RO_NOW |
EC_FLASH_PROTECT_ALL_NOW;
}
-uint32_t flash_physical_get_writable_flags(uint32_t cur_flags)
+uint32_t crec_flash_physical_get_writable_flags(uint32_t cur_flags)
{
uint32_t ret = 0;
@@ -232,10 +232,10 @@ uint32_t flash_physical_get_writable_flags(uint32_t cur_flags)
/*****************************************************************************/
/* High-level APIs */
-int flash_pre_init(void)
+int crec_flash_pre_init(void)
{
uint32_t reset_flags = system_get_reset_flags();
- uint32_t prot_flags = flash_get_protect();
+ uint32_t prot_flags = crec_flash_get_protect();
uint32_t unwanted_prot_flags = EC_FLASH_PROTECT_ALL_NOW |
EC_FLASH_PROTECT_ERROR_INCONSISTENT;
@@ -253,13 +253,13 @@ int flash_pre_init(void)
*/
if ((prot_flags & EC_FLASH_PROTECT_RO_AT_BOOT) &&
!(prot_flags & EC_FLASH_PROTECT_RO_NOW)) {
- int rv = flash_set_protect(EC_FLASH_PROTECT_RO_NOW,
+ int rv = crec_flash_set_protect(EC_FLASH_PROTECT_RO_NOW,
EC_FLASH_PROTECT_RO_NOW);
if (rv)
return rv;
/* Re-read flags */
- prot_flags = flash_get_protect();
+ prot_flags = crec_flash_get_protect();
}
/* Update all-now flag if all flash is protected */
diff --git a/chip/max32660/flash_chip.c b/chip/max32660/flash_chip.c
index ace87294a7..747d7dcc58 100644
--- a/chip/max32660/flash_chip.c
+++ b/chip/max32660/flash_chip.c
@@ -108,7 +108,7 @@ static int flash_device_page_erase(uint32_t address)
return EC_SUCCESS;
}
-int flash_physical_write(int offset, int size, const char *data)
+int crec_flash_physical_write(int offset, int size, const char *data)
{
int err;
uint32_t bytes_written;
@@ -232,7 +232,7 @@ int flash_physical_write(int offset, int size, const char *data)
/*****************************************************************************/
/* Physical layer APIs */
-int flash_physical_erase(int offset, int size)
+int crec_flash_physical_erase(int offset, int size)
{
int i;
int pages;
@@ -255,38 +255,38 @@ int flash_physical_erase(int offset, int size)
return EC_SUCCESS;
}
-int flash_physical_get_protect(int bank)
+int crec_flash_physical_get_protect(int bank)
{
/* Not protected */
return 0;
}
-uint32_t flash_physical_get_protect_flags(void)
+uint32_t crec_flash_physical_get_protect_flags(void)
{
/* no flags set */
return 0;
}
-uint32_t flash_physical_get_valid_flags(void)
+uint32_t crec_flash_physical_get_valid_flags(void)
{
/* These are the flags we're going to pay attention to */
return EC_FLASH_PROTECT_RO_AT_BOOT | EC_FLASH_PROTECT_RO_NOW |
EC_FLASH_PROTECT_ALL_NOW;
}
-uint32_t flash_physical_get_writable_flags(uint32_t cur_flags)
+uint32_t crec_flash_physical_get_writable_flags(uint32_t cur_flags)
{
/* no flags writable */
return 0;
}
-int flash_physical_protect_at_boot(uint32_t new_flags)
+int crec_flash_physical_protect_at_boot(uint32_t new_flags)
{
/* nothing to do here */
return EC_SUCCESS;
}
-int flash_physical_protect_now(int all)
+int crec_flash_physical_protect_now(int all)
{
/* nothing to do here */
return EC_SUCCESS;
@@ -295,7 +295,7 @@ int flash_physical_protect_now(int all)
/*****************************************************************************/
/* High-level APIs */
-int flash_pre_init(void)
+int crec_flash_pre_init(void)
{
return EC_SUCCESS;
}
@@ -330,10 +330,10 @@ static int command_flash_test1(int argc, char **argv)
/*
* erase page
*/
- error_status = flash_physical_erase(flash_address,
+ error_status = crec_flash_physical_erase(flash_address,
CONFIG_FLASH_ERASE_SIZE);
if (error_status != EC_SUCCESS) {
- CPRINTS("Error with flash_physical_erase\n");
+ CPRINTS("Error with crec_flash_physical_erase\n");
return EC_ERROR_UNKNOWN;
}
@@ -356,10 +356,10 @@ static int command_flash_test1(int argc, char **argv)
for (i = 0; i < BUFFER_SIZE; i++) {
buffer[i] = i + page;
}
- error_status = flash_physical_write(flash_address, BUFFER_SIZE,
- buffer);
+ error_status = crec_flash_physical_write(flash_address,
+ BUFFER_SIZE, buffer);
if (error_status != EC_SUCCESS) {
- CPRINTS("Error with flash_physical_write\n");
+ CPRINTS("Error with crec_flash_physical_write\n");
return EC_ERROR_UNKNOWN;
}
}
@@ -389,10 +389,10 @@ static int command_flash_test1(int argc, char **argv)
*/
for (page = PAGE_START; page <= PAGE_END; page++) {
flash_address = page * CONFIG_FLASH_ERASE_SIZE;
- error_status = flash_physical_erase(flash_address,
+ error_status = crec_flash_physical_erase(flash_address,
CONFIG_FLASH_ERASE_SIZE);
if (error_status != EC_SUCCESS) {
- CPRINTS("Error with flash_physical_erase\n");
+ CPRINTS("Error with crec_flash_physical_erase\n");
return EC_ERROR_UNKNOWN;
}
}
diff --git a/chip/mchp/flash.c b/chip/mchp/flash.c
index 043e2b268f..1679cf92cb 100644
--- a/chip/mchp/flash.c
+++ b/chip/mchp/flash.c
@@ -35,7 +35,7 @@ struct flash_wp_state {
* @param size Number of bytes to write.
* @param data Destination buffer for data.
*/
-int flash_physical_read(int offset, int size, char *data)
+int crec_flash_physical_read(int offset, int size, char *data)
{
trace13(0, FLASH, 0,
"flash_phys_read: offset=0x%08X size=0x%08X dataptr=0x%08X",
@@ -52,7 +52,7 @@ int flash_physical_read(int offset, int size, char *data)
* @param size Number of bytes to write.
* @param data Data to write to flash. Must be 32-bit aligned.
*/
-int flash_physical_write(int offset, int size, const char *data)
+int crec_flash_physical_write(int offset, int size, const char *data)
{
int ret = EC_SUCCESS;
int i, write_size;
@@ -87,7 +87,7 @@ int flash_physical_write(int offset, int size, const char *data)
* @param offset Flash offset to erase.
* @param size Number of bytes to erase.
*/
-int flash_physical_erase(int offset, int size)
+int crec_flash_physical_erase(int offset, int size)
{
int ret;
@@ -107,7 +107,7 @@ int flash_physical_erase(int offset, int size)
* @param bank Bank index to check.
* @return non-zero if bank is protected until reboot.
*/
-int flash_physical_get_protect(int bank)
+int crec_flash_physical_get_protect(int bank)
{
return spi_flash_check_protect(bank * CONFIG_FLASH_BANK_SIZE,
CONFIG_FLASH_BANK_SIZE);
@@ -121,7 +121,7 @@ int flash_physical_get_protect(int bank)
* @param all Protect all (=1) or just read-only
* @return non-zero if error.
*/
-int flash_physical_protect_now(int all)
+int crec_flash_physical_protect_now(int all)
{
if (all)
entire_flash_locked = 1;
@@ -142,7 +142,7 @@ int flash_physical_protect_now(int all)
*
* Uses the EC_FLASH_PROTECT_* flags from ec_commands.h
*/
-uint32_t flash_physical_get_protect_flags(void)
+uint32_t crec_flash_physical_get_protect_flags(void)
{
uint32_t flags = 0;
@@ -162,7 +162,7 @@ uint32_t flash_physical_get_protect_flags(void)
*
* @return A combination of EC_FLASH_PROTECT_* flags from ec_commands.h
*/
-uint32_t flash_physical_get_valid_flags(void)
+uint32_t crec_flash_physical_get_valid_flags(void)
{
return EC_FLASH_PROTECT_RO_AT_BOOT |
EC_FLASH_PROTECT_RO_NOW |
@@ -175,7 +175,7 @@ uint32_t flash_physical_get_valid_flags(void)
* @param cur_flags The current flash protect flags.
* @return A combination of EC_FLASH_PROTECT_* flags from ec_commands.h
*/
-uint32_t flash_physical_get_writable_flags(uint32_t cur_flags)
+uint32_t crec_flash_physical_get_writable_flags(uint32_t cur_flags)
{
uint32_t ret = 0;
enum spi_flash_wp wp_status = SPI_WP_NONE;
@@ -204,7 +204,7 @@ uint32_t flash_physical_get_writable_flags(uint32_t cur_flags)
* @param range The range to protect.
* @return EC_SUCCESS, or nonzero if error.
*/
-int flash_physical_protect_at_boot(uint32_t new_flags)
+int crec_flash_physical_protect_at_boot(uint32_t new_flags)
{
int offset, size, ret;
enum spi_flash_wp flashwp = SPI_WP_NONE;
@@ -234,13 +234,13 @@ int flash_physical_protect_at_boot(uint32_t new_flags)
*
* Applies at-boot protection settings if necessary.
*/
-int flash_pre_init(void)
+int crec_flash_pre_init(void)
{
- flash_physical_restore_state();
+ crec_flash_physical_restore_state();
return EC_SUCCESS;
}
-int flash_physical_restore_state(void)
+int crec_flash_physical_restore_state(void)
{
uint32_t reset_flags = system_get_reset_flags();
int version, size;
diff --git a/chip/mec1322/flash.c b/chip/mec1322/flash.c
index b6ab76113b..fac5b08d8f 100644
--- a/chip/mec1322/flash.c
+++ b/chip/mec1322/flash.c
@@ -34,7 +34,7 @@ struct flash_wp_state {
* @param size Number of bytes to write.
* @param data Destination buffer for data.
*/
-int flash_physical_read(int offset, int size, char *data)
+int crec_flash_physical_read(int offset, int size, char *data)
{
return spi_flash_read(data, offset, size);
}
@@ -48,7 +48,7 @@ int flash_physical_read(int offset, int size, char *data)
* @param size Number of bytes to write.
* @param data Data to write to flash. Must be 32-bit aligned.
*/
-int flash_physical_write(int offset, int size, const char *data)
+int crec_flash_physical_write(int offset, int size, const char *data)
{
int ret = EC_SUCCESS;
int i, write_size;
@@ -79,7 +79,7 @@ int flash_physical_write(int offset, int size, const char *data)
* @param offset Flash offset to erase.
* @param size Number of bytes to erase.
*/
-int flash_physical_erase(int offset, int size)
+int crec_flash_physical_erase(int offset, int size)
{
int ret;
@@ -96,7 +96,7 @@ int flash_physical_erase(int offset, int size)
* @param bank Bank index to check.
* @return non-zero if bank is protected until reboot.
*/
-int flash_physical_get_protect(int bank)
+int crec_flash_physical_get_protect(int bank)
{
return spi_flash_check_protect(bank * CONFIG_FLASH_BANK_SIZE,
CONFIG_FLASH_BANK_SIZE);
@@ -110,7 +110,7 @@ int flash_physical_get_protect(int bank)
* @param all Protect all (=1) or just read-only
* @return non-zero if error.
*/
-int flash_physical_protect_now(int all)
+int crec_flash_physical_protect_now(int all)
{
if (all)
entire_flash_locked = 1;
@@ -131,7 +131,7 @@ int flash_physical_protect_now(int all)
*
* Uses the EC_FLASH_PROTECT_* flags from ec_commands.h
*/
-uint32_t flash_physical_get_protect_flags(void)
+uint32_t crec_flash_physical_get_protect_flags(void)
{
uint32_t flags = 0;
@@ -151,7 +151,7 @@ uint32_t flash_physical_get_protect_flags(void)
*
* @return A combination of EC_FLASH_PROTECT_* flags from ec_commands.h
*/
-uint32_t flash_physical_get_valid_flags(void)
+uint32_t crec_flash_physical_get_valid_flags(void)
{
return EC_FLASH_PROTECT_RO_AT_BOOT |
EC_FLASH_PROTECT_RO_NOW |
@@ -164,7 +164,7 @@ uint32_t flash_physical_get_valid_flags(void)
* @param cur_flags The current flash protect flags.
* @return A combination of EC_FLASH_PROTECT_* flags from ec_commands.h
*/
-uint32_t flash_physical_get_writable_flags(uint32_t cur_flags)
+uint32_t crec_flash_physical_get_writable_flags(uint32_t cur_flags)
{
uint32_t ret = 0;
enum spi_flash_wp wp_status = SPI_WP_NONE;
@@ -195,7 +195,7 @@ uint32_t flash_physical_get_writable_flags(uint32_t cur_flags)
* taken care of)
* @return EC_SUCCESS, or nonzero if error.
*/
-int flash_physical_protect_at_boot(uint32_t new_flags)
+int crec_flash_physical_protect_at_boot(uint32_t new_flags)
{
int offset, size, ret;
enum spi_flash_wp flashwp = SPI_WP_NONE;
@@ -225,13 +225,13 @@ int flash_physical_protect_at_boot(uint32_t new_flags)
*
* Applies at-boot protection settings if necessary.
*/
-int flash_pre_init(void)
+int crec_flash_pre_init(void)
{
- flash_physical_restore_state();
+ crec_flash_physical_restore_state();
return EC_SUCCESS;
}
-int flash_physical_restore_state(void)
+int crec_flash_physical_restore_state(void)
{
uint32_t reset_flags = system_get_reset_flags();
int version, size;
diff --git a/chip/npcx/flash.c b/chip/npcx/flash.c
index a5f656f8ca..507b83714c 100644
--- a/chip/npcx/flash.c
+++ b/chip/npcx/flash.c
@@ -153,7 +153,7 @@ static uint8_t flash_get_status1(void)
return saved_sr1;
/* Lock physical flash operations */
- flash_lock_mapped_storage(1);
+ crec_flash_lock_mapped_storage(1);
/* Disable tri-state */
TRISTATE_FLASH(0);
@@ -165,7 +165,7 @@ static uint8_t flash_get_status1(void)
ret = NPCX_UMA_DB0;
/* Unlock physical flash operations */
- flash_lock_mapped_storage(0);
+ crec_flash_lock_mapped_storage(0);
return ret;
}
@@ -178,7 +178,7 @@ static uint8_t flash_get_status2(void)
return saved_sr2;
/* Lock physical flash operations */
- flash_lock_mapped_storage(1);
+ crec_flash_lock_mapped_storage(1);
/* Disable tri-state */
TRISTATE_FLASH(0);
@@ -190,7 +190,7 @@ static uint8_t flash_get_status2(void)
ret = NPCX_UMA_DB0;
/* Unlock physical flash operations */
- flash_lock_mapped_storage(0);
+ crec_flash_lock_mapped_storage(0);
return ret;
}
@@ -217,7 +217,7 @@ static void flash_protect_int_flash(int enable)
void flash_get_mfr_dev_id(uint8_t *dest)
{
/* Lock physical flash operations */
- flash_lock_mapped_storage(1);
+ crec_flash_lock_mapped_storage(1);
/* Disable tri-state */
TRISTATE_FLASH(0);
@@ -232,7 +232,7 @@ void flash_get_mfr_dev_id(uint8_t *dest)
dest[1] = NPCX_UMA_DB1;
/* Unlock physical flash operations */
- flash_lock_mapped_storage(0);
+ crec_flash_lock_mapped_storage(0);
}
#endif /* CONFIG_HOSTCMD_FLASH_SPI_INFO */
@@ -240,7 +240,7 @@ void flash_get_mfr_dev_id(uint8_t *dest)
void flash_get_jedec_id(uint8_t *dest)
{
/* Lock physical flash operations */
- flash_lock_mapped_storage(1);
+ crec_flash_lock_mapped_storage(1);
/* Disable tri-state */
TRISTATE_FLASH(0);
@@ -254,7 +254,7 @@ void flash_get_jedec_id(uint8_t *dest)
dest[2] = NPCX_UMA_DB2;
/* Unlock physical flash operations */
- flash_lock_mapped_storage(0);
+ crec_flash_lock_mapped_storage(0);
}
static void flash_uma_lock(int enable)
@@ -284,7 +284,7 @@ static int flash_set_status_for_prot(int reg1, int reg2)
return EC_ERROR_ACCESS_DENIED;
#endif
- if (flash_get_protect() & EC_FLASH_PROTECT_GPIO_ASSERTED)
+ if (crec_flash_get_protect() & EC_FLASH_PROTECT_GPIO_ASSERTED)
return EC_ERROR_ACCESS_DENIED;
flash_uma_lock(0);
}
@@ -302,7 +302,7 @@ static int flash_set_status_for_prot(int reg1, int reg2)
#endif
/* Lock physical flash operations */
- flash_lock_mapped_storage(1);
+ crec_flash_lock_mapped_storage(1);
/* Disable tri-state */
TRISTATE_FLASH(0);
@@ -318,7 +318,7 @@ static int flash_set_status_for_prot(int reg1, int reg2)
TRISTATE_FLASH(1);
/* Unlock physical flash operations */
- flash_lock_mapped_storage(0);
+ crec_flash_lock_mapped_storage(0);
spi_flash_reg_to_protect(reg1, reg2,
&addr_prot_start, &addr_prot_length);
@@ -452,13 +452,13 @@ static int flash_program_bytes(uint32_t offset, uint32_t bytes,
/*****************************************************************************/
-int flash_physical_read(int offset, int size, char *data)
+int crec_flash_physical_read(int offset, int size, char *data)
{
int dest_addr = offset;
uint32_t idx;
/* Lock physical flash operations */
- flash_lock_mapped_storage(1);
+ crec_flash_lock_mapped_storage(1);
/* Disable tri-state */
TRISTATE_FLASH(0);
@@ -487,12 +487,12 @@ int flash_physical_read(int offset, int size, char *data)
TRISTATE_FLASH(1);
/* Unlock physical flash operations */
- flash_lock_mapped_storage(0);
+ crec_flash_lock_mapped_storage(0);
return EC_SUCCESS;
}
-int flash_physical_write(int offset, int size, const char *data)
+int crec_flash_physical_write(int offset, int size, const char *data)
{
int dest_addr = offset;
int write_len;
@@ -508,7 +508,7 @@ int flash_physical_write(int offset, int size, const char *data)
return EC_ERROR_ACCESS_DENIED;
/* Lock physical flash operations */
- flash_lock_mapped_storage(1);
+ crec_flash_lock_mapped_storage(1);
/* Disable tri-state */
TRISTATE_FLASH(0);
@@ -537,12 +537,12 @@ int flash_physical_write(int offset, int size, const char *data)
TRISTATE_FLASH(1);
/* Unlock physical flash operations */
- flash_lock_mapped_storage(0);
+ crec_flash_lock_mapped_storage(0);
return rv;
}
-int flash_physical_erase(int offset, int size)
+int crec_flash_physical_erase(int offset, int size)
{
int rv = EC_SUCCESS;
/* check protection */
@@ -550,7 +550,7 @@ int flash_physical_erase(int offset, int size)
return EC_ERROR_ACCESS_DENIED;
/* Lock physical flash operations */
- flash_lock_mapped_storage(1);
+ crec_flash_lock_mapped_storage(1);
/* Disable tri-state */
TRISTATE_FLASH(0);
@@ -591,19 +591,19 @@ int flash_physical_erase(int offset, int size)
TRISTATE_FLASH(1);
/* Unlock physical flash operations */
- flash_lock_mapped_storage(0);
+ crec_flash_lock_mapped_storage(0);
return rv;
}
-int flash_physical_get_protect(int bank)
+int crec_flash_physical_get_protect(int bank)
{
uint32_t addr = bank * CONFIG_FLASH_BANK_SIZE;
return flash_check_prot_reg(addr, CONFIG_FLASH_BANK_SIZE);
}
-uint32_t flash_physical_get_protect_flags(void)
+uint32_t crec_flash_physical_get_protect_flags(void)
{
uint32_t flags = 0;
@@ -626,7 +626,7 @@ uint32_t flash_physical_get_protect_flags(void)
return flags;
}
-int flash_physical_protect_now(int all)
+int crec_flash_physical_protect_now(int all)
{
if (all) {
/*
@@ -642,7 +642,7 @@ int flash_physical_protect_now(int all)
}
-int flash_physical_protect_at_boot(uint32_t new_flags)
+int crec_flash_physical_protect_at_boot(uint32_t new_flags)
{
int ret;
@@ -666,14 +666,14 @@ int flash_physical_protect_at_boot(uint32_t new_flags)
return ret;
}
-uint32_t flash_physical_get_valid_flags(void)
+uint32_t crec_flash_physical_get_valid_flags(void)
{
return EC_FLASH_PROTECT_RO_AT_BOOT |
EC_FLASH_PROTECT_RO_NOW |
EC_FLASH_PROTECT_ALL_NOW;
}
-uint32_t flash_physical_get_writable_flags(uint32_t cur_flags)
+uint32_t crec_flash_physical_get_writable_flags(uint32_t cur_flags)
{
uint32_t ret = 0;
@@ -695,7 +695,7 @@ uint32_t flash_physical_get_writable_flags(uint32_t cur_flags)
/*****************************************************************************/
/* High-level APIs */
-int flash_pre_init(void)
+int crec_flash_pre_init(void)
{
/*
* Protect status registers of internal spi-flash if WP# is active
@@ -724,7 +724,7 @@ int flash_pre_init(void)
return EC_SUCCESS;
}
-void flash_lock_mapped_storage(int lock)
+void crec_flash_lock_mapped_storage(int lock)
{
if (lock)
mutex_lock(&flash_lock);
diff --git a/chip/stm32/flash-f.c b/chip/stm32/flash-f.c
index b192d44255..9e35a2c689 100644
--- a/chip/stm32/flash-f.c
+++ b/chip/stm32/flash-f.c
@@ -341,7 +341,7 @@ bool is_flash_rdp_enabled(void)
/*****************************************************************************/
/* Physical layer APIs */
-int flash_physical_write(int offset, int size, const char *data)
+int crec_flash_physical_write(int offset, int size, const char *data)
{
#if CONFIG_FLASH_WRITE_SIZE == 1
uint8_t *address = (uint8_t *)(CONFIG_PROGRAM_MEMORY_BASE + offset);
@@ -420,15 +420,15 @@ exit_wr:
return res;
}
-int flash_physical_erase(int offset, int size)
+int crec_flash_physical_erase(int offset, int size)
{
int res = EC_SUCCESS;
int sector_size;
int timeout_us;
#ifdef CHIP_FAMILY_STM32F4
- int sector = flash_bank_index(offset);
+ int sector = crec_flash_bank_index(offset);
/* we take advantage of sector_size == erase_size */
- if ((sector < 0) || (flash_bank_index(offset + size) < 0))
+ if ((sector < 0) || (crec_flash_bank_index(offset + size) < 0))
return EC_ERROR_INVAL; /* Invalid range */
#endif
@@ -444,7 +444,7 @@ int flash_physical_erase(int offset, int size)
while (size > 0) {
timestamp_t deadline;
#ifdef CHIP_FAMILY_STM32F4
- sector_size = flash_bank_size(sector);
+ sector_size = crec_flash_bank_size(sector);
/* Timeout: from spec, proportional to the size
* inversely proportional to the write size.
*/
@@ -454,7 +454,7 @@ int flash_physical_erase(int offset, int size)
timeout_us = FLASH_ERASE_TIMEOUT_US;
#endif
/* Do nothing if already erased */
- if (flash_is_erased(offset, sector_size))
+ if (crec_flash_is_erased(offset, sector_size))
goto next_sector;
#ifdef CHIP_FAMILY_STM32F4
/* select page to erase */
@@ -533,7 +533,7 @@ static int flash_physical_protect_at_boot_update_rdp_pstate(uint32_t new_flags)
#endif
}
-int flash_physical_protect_at_boot(uint32_t new_flags)
+int crec_flash_physical_protect_at_boot(uint32_t new_flags)
{
int block;
int original_val, val;
@@ -580,7 +580,7 @@ static int flash_physical_get_protect_at_boot(int block)
return (!(val & (1 << (block % 8)))) ? 1 : 0;
}
-int flash_physical_protect_at_boot(uint32_t new_flags)
+int crec_flash_physical_protect_at_boot(uint32_t new_flags)
{
int block;
int i;
@@ -646,7 +646,7 @@ static void unprotect_all_blocks(void)
*/
static int registers_need_reset(void)
{
- uint32_t flags = flash_get_protect();
+ uint32_t flags = crec_flash_get_protect();
int i;
int ro_at_boot = (flags & EC_FLASH_PROTECT_RO_AT_BOOT) ? 1 : 0;
int ro_wp_region_start = WP_BANK_OFFSET;
@@ -723,10 +723,10 @@ enum flash_rdp_level flash_physical_get_rdp_level(void)
/*****************************************************************************/
/* High-level APIs */
-int flash_pre_init(void)
+int crec_flash_pre_init(void)
{
uint32_t reset_flags = system_get_reset_flags();
- uint32_t prot_flags = flash_get_protect();
+ uint32_t prot_flags = crec_flash_get_protect();
int need_reset = 0;
@@ -738,7 +738,7 @@ int flash_pre_init(void)
STM32_FLASH_CR_PSIZE_OFFSET;
lock();
#endif
- if (flash_physical_restore_state())
+ if (crec_flash_physical_restore_state())
return EC_SUCCESS;
/*
@@ -751,7 +751,7 @@ int flash_pre_init(void)
if (prot_flags & EC_FLASH_PROTECT_GPIO_ASSERTED) {
if (prot_flags & EC_FLASH_PROTECT_RO_NOW) {
/* Enable physical protection for RO (0 means RO). */
- flash_physical_protect_now(0);
+ crec_flash_physical_protect_now(0);
}
if ((prot_flags & EC_FLASH_PROTECT_RO_AT_BOOT) &&
@@ -762,7 +762,7 @@ int flash_pre_init(void)
* update to the write protect register and reboot so
* it takes effect.
*/
- flash_physical_protect_at_boot(
+ crec_flash_physical_protect_at_boot(
EC_FLASH_PROTECT_RO_AT_BOOT);
need_reset = 1;
}
@@ -776,7 +776,7 @@ int flash_pre_init(void)
* to the check above. One of them should be able to
* go away.
*/
- flash_protect_at_boot(
+ crec_flash_protect_at_boot(
prot_flags & EC_FLASH_PROTECT_RO_AT_BOOT);
need_reset = 1;
}
@@ -791,7 +791,8 @@ int flash_pre_init(void)
}
}
- if ((flash_physical_get_valid_flags() & EC_FLASH_PROTECT_ALL_AT_BOOT) &&
+ if ((crec_flash_physical_get_valid_flags() &
+ EC_FLASH_PROTECT_ALL_AT_BOOT) &&
(!!(prot_flags & EC_FLASH_PROTECT_ALL_AT_BOOT) !=
!!(prot_flags & EC_FLASH_PROTECT_ALL_NOW))) {
/*
@@ -806,7 +807,8 @@ int flash_pre_init(void)
}
#ifdef CONFIG_FLASH_PROTECT_RW
- if ((flash_physical_get_valid_flags() & EC_FLASH_PROTECT_RW_AT_BOOT) &&
+ if ((crec_flash_physical_get_valid_flags() &
+ EC_FLASH_PROTECT_RW_AT_BOOT) &&
(!!(prot_flags & EC_FLASH_PROTECT_RW_AT_BOOT) !=
!!(prot_flags & EC_FLASH_PROTECT_RW_NOW))) {
/* RW_AT_BOOT and RW_NOW do not match. */
@@ -815,7 +817,8 @@ int flash_pre_init(void)
#endif
#ifdef CONFIG_ROLLBACK
- if ((flash_physical_get_valid_flags() & EC_FLASH_PROTECT_ROLLBACK_AT_BOOT) &&
+ if ((crec_flash_physical_get_valid_flags() &
+ EC_FLASH_PROTECT_ROLLBACK_AT_BOOT) &&
(!!(prot_flags & EC_FLASH_PROTECT_ROLLBACK_AT_BOOT) !=
!!(prot_flags & EC_FLASH_PROTECT_ROLLBACK_NOW))) {
/* ROLLBACK_AT_BOOT and ROLLBACK_NOW do not match. */
diff --git a/chip/stm32/flash-stm32f0.c b/chip/stm32/flash-stm32f0.c
index a0aef5fe3f..f790a657c8 100644
--- a/chip/stm32/flash-stm32f0.c
+++ b/chip/stm32/flash-stm32f0.c
@@ -13,7 +13,7 @@
/*****************************************************************************/
/* Physical layer APIs */
-int flash_physical_get_protect(int block)
+int crec_flash_physical_get_protect(int block)
{
return !(STM32_FLASH_WRPR & BIT(block));
}
@@ -22,7 +22,7 @@ int flash_physical_get_protect(int block)
* Note: This does not need to update _NOW flags, as get_protect_flags
* in common code already does so.
*/
-uint32_t flash_physical_get_protect_flags(void)
+uint32_t crec_flash_physical_get_protect_flags(void)
{
uint32_t flags = 0;
uint32_t wrp01 = REG32(STM32_OPTB_BASE + STM32_OPTB_WRP01);
@@ -114,18 +114,18 @@ uint32_t flash_physical_get_protect_flags(void)
return flags;
}
-int flash_physical_protect_now(int all)
+int crec_flash_physical_protect_now(int all)
{
return EC_ERROR_INVAL;
}
-int flash_physical_restore_state(void)
+int crec_flash_physical_restore_state(void)
{
/* Nothing to restore */
return 0;
}
-uint32_t flash_physical_get_valid_flags(void)
+uint32_t crec_flash_physical_get_valid_flags(void)
{
return EC_FLASH_PROTECT_RO_AT_BOOT |
EC_FLASH_PROTECT_RO_NOW |
@@ -141,7 +141,7 @@ uint32_t flash_physical_get_valid_flags(void)
EC_FLASH_PROTECT_ALL_NOW;
}
-uint32_t flash_physical_get_writable_flags(uint32_t cur_flags)
+uint32_t crec_flash_physical_get_writable_flags(uint32_t cur_flags)
{
uint32_t ret = 0;
diff --git a/chip/stm32/flash-stm32f3.c b/chip/stm32/flash-stm32f3.c
index 563190b252..138e690fcc 100644
--- a/chip/stm32/flash-stm32f3.c
+++ b/chip/stm32/flash-stm32f3.c
@@ -94,7 +94,7 @@ struct flash_wp_state {
/*****************************************************************************/
/* Physical layer APIs */
-int flash_physical_get_protect(int block)
+int crec_flash_physical_get_protect(int block)
{
return (entire_flash_locked ||
#if defined(CHIP_FAMILY_STM32F3)
@@ -105,7 +105,7 @@ int flash_physical_get_protect(int block)
);
}
-uint32_t flash_physical_get_protect_flags(void)
+uint32_t crec_flash_physical_get_protect_flags(void)
{
uint32_t flags = 0;
@@ -121,7 +121,7 @@ uint32_t flash_physical_get_protect_flags(void)
return flags;
}
-int flash_physical_protect_now(int all)
+int crec_flash_physical_protect_now(int all)
{
if (all) {
disable_flash_control_register();
@@ -135,14 +135,14 @@ int flash_physical_protect_now(int all)
return EC_SUCCESS;
}
-uint32_t flash_physical_get_valid_flags(void)
+uint32_t crec_flash_physical_get_valid_flags(void)
{
return EC_FLASH_PROTECT_RO_AT_BOOT |
EC_FLASH_PROTECT_RO_NOW |
EC_FLASH_PROTECT_ALL_NOW;
}
-uint32_t flash_physical_get_writable_flags(uint32_t cur_flags)
+uint32_t crec_flash_physical_get_writable_flags(uint32_t cur_flags)
{
uint32_t ret = 0;
@@ -161,7 +161,7 @@ uint32_t flash_physical_get_writable_flags(uint32_t cur_flags)
return ret;
}
-int flash_physical_restore_state(void)
+int crec_flash_physical_restore_state(void)
{
uint32_t reset_flags = system_get_reset_flags();
int version, size;
diff --git a/chip/stm32/flash-stm32g4-l4.c b/chip/stm32/flash-stm32g4-l4.c
index c04c17bb3b..ff8ca34b52 100644
--- a/chip/stm32/flash-stm32g4-l4.c
+++ b/chip/stm32/flash-stm32g4-l4.c
@@ -330,7 +330,7 @@ static void unprotect_all_blocks(void)
commit_optb();
}
-int flash_physical_protect_at_boot(uint32_t new_flags)
+int crec_flash_physical_protect_at_boot(uint32_t new_flags)
{
struct wrp_info wrp_ro;
struct wrp_info wrp_rw;
@@ -411,7 +411,7 @@ int flash_physical_protect_at_boot(uint32_t new_flags)
*/
static int registers_need_reset(void)
{
- uint32_t flags = flash_get_protect();
+ uint32_t flags = crec_flash_get_protect();
int ro_at_boot = (flags & EC_FLASH_PROTECT_RO_AT_BOOT) ? 1 : 0;
/* The RO region is write-protected by the WRP1AR range. */
uint32_t wrp1ar = STM32_OPTB_WRP1AR;
@@ -426,7 +426,7 @@ static int registers_need_reset(void)
/*****************************************************************************/
/* Physical layer APIs */
-int flash_physical_write(int offset, int size, const char *data)
+int crec_flash_physical_write(int offset, int size, const char *data)
{
uint32_t *address = (void *)(CONFIG_PROGRAM_MEMORY_BASE + offset);
int res = EC_SUCCESS;
@@ -501,7 +501,7 @@ exit_wr:
return res;
}
-int flash_physical_erase(int offset, int size)
+int crec_flash_physical_erase(int offset, int size)
{
int res = EC_SUCCESS;
int pg;
@@ -560,7 +560,7 @@ exit_er:
return res;
}
-int flash_physical_get_protect(int block)
+int crec_flash_physical_get_protect(int block)
{
struct wrp_info wrp_ro;
struct wrp_info wrp_rw;
@@ -576,7 +576,7 @@ int flash_physical_get_protect(int block)
* Note: This does not need to update _NOW flags, as get_protect_flags
* in common code already does so.
*/
-uint32_t flash_physical_get_protect_flags(void)
+uint32_t crec_flash_physical_get_protect_flags(void)
{
uint32_t flags = 0;
struct wrp_info wrp_ro;
@@ -610,12 +610,12 @@ uint32_t flash_physical_get_protect_flags(void)
return flags;
}
-int flash_physical_protect_now(int all)
+int crec_flash_physical_protect_now(int all)
{
return EC_ERROR_INVAL;
}
-uint32_t flash_physical_get_valid_flags(void)
+uint32_t crec_flash_physical_get_valid_flags(void)
{
return EC_FLASH_PROTECT_RO_AT_BOOT |
EC_FLASH_PROTECT_RO_NOW |
@@ -631,7 +631,7 @@ uint32_t flash_physical_get_valid_flags(void)
EC_FLASH_PROTECT_ALL_NOW;
}
-uint32_t flash_physical_get_writable_flags(uint32_t cur_flags)
+uint32_t crec_flash_physical_get_writable_flags(uint32_t cur_flags)
{
uint32_t ret = 0;
@@ -662,10 +662,10 @@ uint32_t flash_physical_get_writable_flags(uint32_t cur_flags)
return ret;
}
-int flash_pre_init(void)
+int crec_flash_pre_init(void)
{
uint32_t reset_flags = system_get_reset_flags();
- uint32_t prot_flags = flash_get_protect();
+ uint32_t prot_flags = crec_flash_get_protect();
int need_reset = 0;
/*
@@ -684,7 +684,7 @@ int flash_pre_init(void)
* update to the write protect register and reboot so
* it takes effect.
*/
- flash_physical_protect_at_boot(
+ crec_flash_physical_protect_at_boot(
EC_FLASH_PROTECT_RO_AT_BOOT);
need_reset = 1;
}
@@ -698,7 +698,7 @@ int flash_pre_init(void)
* to the check above. One of them should be able to
* go away.
*/
- flash_protect_at_boot(
+ crec_flash_protect_at_boot(
prot_flags & EC_FLASH_PROTECT_RO_AT_BOOT);
need_reset = 1;
}
@@ -713,7 +713,8 @@ int flash_pre_init(void)
}
}
- if ((flash_physical_get_valid_flags() & EC_FLASH_PROTECT_ALL_AT_BOOT) &&
+ if ((crec_flash_physical_get_valid_flags() &
+ EC_FLASH_PROTECT_ALL_AT_BOOT) &&
(!!(prot_flags & EC_FLASH_PROTECT_ALL_AT_BOOT) !=
!!(prot_flags & EC_FLASH_PROTECT_ALL_NOW))) {
/*
@@ -728,7 +729,8 @@ int flash_pre_init(void)
}
#ifdef CONFIG_FLASH_PROTECT_RW
- if ((flash_physical_get_valid_flags() & EC_FLASH_PROTECT_RW_AT_BOOT) &&
+ if ((crec_flash_physical_get_valid_flags() &
+ EC_FLASH_PROTECT_RW_AT_BOOT) &&
(!!(prot_flags & EC_FLASH_PROTECT_RW_AT_BOOT) !=
!!(prot_flags & EC_FLASH_PROTECT_RW_NOW))) {
/* RW_AT_BOOT and RW_NOW do not match. */
@@ -737,7 +739,7 @@ int flash_pre_init(void)
#endif
#ifdef CONFIG_ROLLBACK
- if ((flash_physical_get_valid_flags() &
+ if ((crec_flash_physical_get_valid_flags() &
EC_FLASH_PROTECT_ROLLBACK_AT_BOOT) &&
(!!(prot_flags & EC_FLASH_PROTECT_ROLLBACK_AT_BOOT) !=
!!(prot_flags & EC_FLASH_PROTECT_ROLLBACK_NOW))) {
diff --git a/chip/stm32/flash-stm32h7.c b/chip/stm32/flash-stm32h7.c
index e020e1af1d..6c8c797c41 100644
--- a/chip/stm32/flash-stm32h7.c
+++ b/chip/stm32/flash-stm32h7.c
@@ -287,7 +287,7 @@ static int set_wp(int enabled)
/*****************************************************************************/
/* Physical layer APIs */
-int flash_physical_write(int offset, int size, const char *data)
+int crec_flash_physical_write(int offset, int size, const char *data)
{
int res = EC_SUCCESS;
int bank = offset / HWBANK_SIZE;
@@ -365,7 +365,7 @@ exit_wr:
return res;
}
-int flash_physical_erase(int offset, int size)
+int crec_flash_physical_erase(int offset, int size)
{
int res = EC_SUCCESS;
int bank = offset / HWBANK_SIZE;
@@ -441,7 +441,7 @@ exit_er:
return res;
}
-int flash_physical_get_protect(int block)
+int crec_flash_physical_get_protect(int block)
{
int bank = block / BLOCKS_PER_HWBANK;
int index = block % BLOCKS_PER_HWBANK;
@@ -453,7 +453,7 @@ int flash_physical_get_protect(int block)
* Note: This does not need to update _NOW flags, as flash_get_protect
* in common code already does so.
*/
-uint32_t flash_physical_get_protect_flags(void)
+uint32_t crec_flash_physical_get_protect_flags(void)
{
uint32_t flags = 0;
@@ -473,7 +473,7 @@ uint32_t flash_physical_get_protect_flags(void)
#define WP_RANGE(start, count) (((1 << (count)) - 1) << (start))
#define RO_WP_RANGE WP_RANGE(WP_BANK_OFFSET, WP_BANK_COUNT)
-int flash_physical_protect_now(int all)
+int crec_flash_physical_protect_now(int all)
{
protect_blocks(RO_WP_RANGE);
@@ -499,7 +499,7 @@ int flash_physical_protect_now(int all)
return EC_SUCCESS;
}
-int flash_physical_protect_at_boot(uint32_t new_flags)
+int crec_flash_physical_protect_at_boot(uint32_t new_flags)
{
int new_wp_enable = !!(new_flags & EC_FLASH_PROTECT_RO_AT_BOOT);
@@ -509,14 +509,14 @@ int flash_physical_protect_at_boot(uint32_t new_flags)
return EC_SUCCESS;
}
-uint32_t flash_physical_get_valid_flags(void)
+uint32_t crec_flash_physical_get_valid_flags(void)
{
return EC_FLASH_PROTECT_RO_AT_BOOT |
EC_FLASH_PROTECT_RO_NOW |
EC_FLASH_PROTECT_ALL_NOW;
}
-uint32_t flash_physical_get_writable_flags(uint32_t cur_flags)
+uint32_t crec_flash_physical_get_writable_flags(uint32_t cur_flags)
{
uint32_t ret = 0;
@@ -535,7 +535,7 @@ uint32_t flash_physical_get_writable_flags(uint32_t cur_flags)
return ret;
}
-int flash_physical_restore_state(void)
+int crec_flash_physical_restore_state(void)
{
uint32_t reset_flags = system_get_reset_flags();
int version, size;
@@ -561,14 +561,14 @@ int flash_physical_restore_state(void)
return 0;
}
-int flash_pre_init(void)
+int crec_flash_pre_init(void)
{
uint32_t reset_flags = system_get_reset_flags();
- uint32_t prot_flags = flash_get_protect();
+ uint32_t prot_flags = crec_flash_get_protect();
uint32_t unwanted_prot_flags = EC_FLASH_PROTECT_ALL_NOW |
EC_FLASH_PROTECT_ERROR_INCONSISTENT;
- if (flash_physical_restore_state())
+ if (crec_flash_physical_restore_state())
return EC_SUCCESS;
/*
@@ -587,13 +587,13 @@ int flash_pre_init(void)
!(prot_flags & EC_FLASH_PROTECT_RO_NOW)) {
int rv;
- rv = flash_set_protect(EC_FLASH_PROTECT_RO_NOW,
- EC_FLASH_PROTECT_RO_NOW);
+ rv = crec_flash_set_protect(EC_FLASH_PROTECT_RO_NOW,
+ EC_FLASH_PROTECT_RO_NOW);
if (rv)
return rv;
/* Re-read flags */
- prot_flags = flash_get_protect();
+ prot_flags = crec_flash_get_protect();
}
} else {
/* Don't want RO flash protected */
diff --git a/chip/stm32/flash-stm32l.c b/chip/stm32/flash-stm32l.c
index a151a26cf8..f34200219a 100644
--- a/chip/stm32/flash-stm32l.c
+++ b/chip/stm32/flash-stm32l.c
@@ -158,7 +158,7 @@ void __attribute__((section(".iram.text")))
STM32_FLASH_PECR &= ~(STM32_FLASH_PECR_PROG | STM32_FLASH_PECR_FPRG);
}
-int flash_physical_write(int offset, int size, const char *data)
+int crec_flash_physical_write(int offset, int size, const char *data)
{
uint32_t *data32 = (uint32_t *)data;
uint32_t *address = (uint32_t *)(CONFIG_PROGRAM_MEMORY_BASE + offset);
@@ -240,7 +240,7 @@ exit_wr:
return res;
}
-int flash_physical_erase(int offset, int size)
+int crec_flash_physical_erase(int offset, int size)
{
uint32_t *address;
int res = EC_SUCCESS;
@@ -261,7 +261,7 @@ int flash_physical_erase(int offset, int size)
timestamp_t deadline;
/* Do nothing if already erased */
- if (flash_is_erased((uint32_t)address -
+ if (crec_flash_is_erased((uint32_t)address -
CONFIG_PROGRAM_MEMORY_BASE,
CONFIG_FLASH_ERASE_SIZE))
continue;
@@ -304,20 +304,20 @@ exit_er:
return res;
}
-int flash_physical_get_protect(int block)
+int crec_flash_physical_get_protect(int block)
{
/*
* If the entire flash interface is locked, then all blocks are
* protected until reboot.
*/
- if (flash_physical_get_protect_flags() & EC_FLASH_PROTECT_ALL_NOW)
+ if (crec_flash_physical_get_protect_flags() & EC_FLASH_PROTECT_ALL_NOW)
return 1;
/* Check the active write protect status */
return STM32_FLASH_WRPR & BIT(block);
}
-int flash_physical_protect_at_boot(uint32_t new_flags)
+int crec_flash_physical_protect_at_boot(uint32_t new_flags)
{
uint32_t prot;
uint32_t mask = (BIT(WP_BANK_COUNT) - 1) << WP_BANK_OFFSET;
@@ -352,7 +352,7 @@ int flash_physical_protect_at_boot(uint32_t new_flags)
return EC_SUCCESS;
}
-int flash_physical_force_reload(void)
+int crec_flash_physical_force_reload(void)
{
int rv = unlock(STM32_FLASH_PECR_OPT_LOCK);
@@ -367,7 +367,7 @@ int flash_physical_force_reload(void)
return EC_ERROR_UNKNOWN;
}
-uint32_t flash_physical_get_protect_flags(void)
+uint32_t crec_flash_physical_get_protect_flags(void)
{
uint32_t flags = 0;
@@ -382,7 +382,7 @@ uint32_t flash_physical_get_protect_flags(void)
return flags;
}
-int flash_physical_protect_now(int all)
+int crec_flash_physical_protect_now(int all)
{
if (all) {
/* Re-lock the registers if they're unlocked */
@@ -400,14 +400,14 @@ int flash_physical_protect_now(int all)
}
}
-uint32_t flash_physical_get_valid_flags(void)
+uint32_t crec_flash_physical_get_valid_flags(void)
{
return EC_FLASH_PROTECT_RO_AT_BOOT |
EC_FLASH_PROTECT_RO_NOW |
EC_FLASH_PROTECT_ALL_NOW;
}
-uint32_t flash_physical_get_writable_flags(uint32_t cur_flags)
+uint32_t crec_flash_physical_get_writable_flags(uint32_t cur_flags)
{
uint32_t ret = 0;
@@ -426,10 +426,10 @@ uint32_t flash_physical_get_writable_flags(uint32_t cur_flags)
return ret;
}
-int flash_pre_init(void)
+int crec_flash_pre_init(void)
{
uint32_t reset_flags = system_get_reset_flags();
- uint32_t prot_flags = flash_get_protect();
+ uint32_t prot_flags = crec_flash_get_protect();
int need_reset = 0;
/*
@@ -448,7 +448,7 @@ int flash_pre_init(void)
* update to the write protect register and reboot so
* it takes effect.
*/
- flash_protect_at_boot(EC_FLASH_PROTECT_RO_AT_BOOT);
+ crec_flash_protect_at_boot(EC_FLASH_PROTECT_RO_AT_BOOT);
need_reset = 1;
}
@@ -457,7 +457,7 @@ int flash_pre_init(void)
* Write protect register was in an inconsistent state.
* Set it back to a good state and reboot.
*/
- flash_protect_at_boot(prot_flags &
+ crec_flash_protect_at_boot(prot_flags &
EC_FLASH_PROTECT_RO_AT_BOOT);
need_reset = 1;
}
diff --git a/chip/stm32/otp-stm32f4.c b/chip/stm32/otp-stm32f4.c
index a993af7042..45ce38d159 100644
--- a/chip/stm32/otp-stm32f4.c
+++ b/chip/stm32/otp-stm32f4.c
@@ -39,9 +39,9 @@ static int otp_write(uint8_t block, int size, const char *data)
return EC_ERROR_PARAM1;
if (size >= STM32_OTP_BLOCK_SIZE)
return EC_ERROR_PARAM2;
- return flash_physical_write(STM32_OTP_BLOCK_DATA(block, 0) -
- CONFIG_PROGRAM_MEMORY_BASE,
- size * sizeof(uint32_t), data);
+ return crec_flash_physical_write(STM32_OTP_BLOCK_DATA(block, 0) -
+ CONFIG_PROGRAM_MEMORY_BASE,
+ size * sizeof(uint32_t), data);
}
/*
@@ -73,9 +73,9 @@ static int otp_set_protect(uint8_t block)
lock = REG32(STM32_OTP_LOCK(block));
lock &= ~STM32_OPT_LOCK_MASK(block);
- rv = flash_physical_write(STM32_OTP_LOCK(block) -
- CONFIG_PROGRAM_MEMORY_BASE,
- sizeof(uint32_t), (char *)&lock);
+ rv = crec_flash_physical_write(STM32_OTP_LOCK(block) -
+ CONFIG_PROGRAM_MEMORY_BASE,
+ sizeof(uint32_t), (char *)&lock);
if (rv)
return rv;
else
diff --git a/chip/stm32/system.c b/chip/stm32/system.c
index 8367ae2a12..1a9da8c3a4 100644
--- a/chip/stm32/system.c
+++ b/chip/stm32/system.c
@@ -393,7 +393,7 @@ void system_reset(int flags)
* Ask the flash module to reboot, so that we reload the
* option bytes.
*/
- flash_physical_force_reload();
+ crec_flash_physical_force_reload();
/* Fall through to watchdog if that fails */
#endif