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author | Tzung-Bi Shih <tzungbi@chromium.org> | 2020-06-30 08:19:51 +0800 |
---|---|---|
committer | Commit Bot <commit-bot@chromium.org> | 2020-07-02 10:16:39 +0000 |
commit | fc5f9662cd4ad5bd6fe69226e2034d512c78e1b2 (patch) | |
tree | bb49b45f54a7adfe0cbb788aa864a39e4169613d /chip | |
parent | 7850b53984dc4fe7b797ce341c25554b994165a5 (diff) | |
download | chrome-ec-fc5f9662cd4ad5bd6fe69226e2034d512c78e1b2.tar.gz |
chip/mt8192_scp: use 0 for dummy priority number
3rd argument of DECLARE_IRQ is dummy in core/riscv-rv32i. Uses 0 for
them to avoid misunderstanding.
BRANCH=none
BUG=b:146213943
BUG=b:156220843
BUG=b:156221696
TEST=make BOARD=asurada_scp
Signed-off-by: Tzung-Bi Shih <tzungbi@chromium.org>
Change-Id: Id0ea8e7c432eb0e09324864865bea9adc72264f6
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2275708
Reviewed-by: Eric Yilun Lin <yllin@chromium.org>
Diffstat (limited to 'chip')
-rw-r--r-- | chip/mt8192_scp/hrtimer.c | 2 | ||||
-rw-r--r-- | chip/mt8192_scp/uart.c | 2 |
2 files changed, 2 insertions, 2 deletions
diff --git a/chip/mt8192_scp/hrtimer.c b/chip/mt8192_scp/hrtimer.c index dfa451b612..a3f0ed3298 100644 --- a/chip/mt8192_scp/hrtimer.c +++ b/chip/mt8192_scp/hrtimer.c @@ -218,4 +218,4 @@ static void irq_group6_handler(void) break; } } -DECLARE_IRQ(6, irq_group6_handler, 2); +DECLARE_IRQ(6, irq_group6_handler, 0); diff --git a/chip/mt8192_scp/uart.c b/chip/mt8192_scp/uart.c index 9ed9284e24..6264b03b07 100644 --- a/chip/mt8192_scp/uart.c +++ b/chip/mt8192_scp/uart.c @@ -139,7 +139,7 @@ static void irq_group12_handler(void) break; } } -DECLARE_IRQ(12, irq_group12_handler, 2); +DECLARE_IRQ(12, irq_group12_handler, 0); #else #ifndef HAS_TASK_APUART |