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authorPatryk Duda <pdk@semihalf.com>2021-06-09 15:35:29 +0200
committerCommit Bot <commit-bot@chromium.org>2021-09-06 09:43:49 +0000
commitbc257547d8d819af64d6e90341900e23030151c0 (patch)
treea33cfa58d122caf0d2bf78a5e8da1f6b00962fbd /chip
parent51625cbd2ccc7c7f976d1f2e6b64e2f1f75bc1ff (diff)
downloadchrome-ec-bc257547d8d819af64d6e90341900e23030151c0.tar.gz
cortex-m0/task: Check if interrupts are enabled before switching task
Switching task with disabled interrupts leads to Hard Fault on Cortex-M0 because: - SVCall exception have configurable priority (full list can be found at 2.3.2 Exception types PM0215 p.23) - We are using 'cpsid i' to disable interrupts. This instruction sets PRIMASK bit (3.7.2 CPSID CPSIE PM0215 p.62) - When PRIMASK bit is set, all exceptions with configurable priority are disabled (PM0215 p.16), so SVCall is masked too If Hard Fault is inevitable, it will be a good idea to catch this earlier. It will save time spent debugging why Forced Hard Fault happens. In functions responsible for enabling, disabling or making task ready we postpone task switch when interrupts are disabled BUG=b:190597666 BRANCH=none TEST=Compile and flash EC on boards with Cortex-M0 and make sure that it works properly. Signed-off-by: Patryk Duda <pdk@semihalf.com> Change-Id: Id3be74e977ae5d5eed79aad78ee378fa413ed4ee Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2953229 Commit-Queue: Marcin Wojtas <mwojtas@google.com> Tested-by: Patryk Duda <patrykd@google.com> Reviewed-by: Aseda Aboagye <aaboagye@chromium.org>
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