USB: Fix issue with USB RAM sizes

Previously the USB RAM size was off by a factor of two
for chips that required 32-bit alignment of accesses,
even though the underlying memory was 16-bits in size.
This change adds an additional configuration for the
access size (it still assumes that the underlying memory
is 16-bits in size) and uses that to adjust the USB_RAM
memory section in the linker scripts.

This change also removes the default values for the USB
RAM from stm32/config_chip.h because they mask issues
when new chips are added.  It is better for a new chip
to fail to compile until these values are provided.

Finally, this change introduces a common USB API header
so that common code doesn't need to include the STM32
specific header.

Signed-off-by: Anton Staaf <robotboy@chromium.org>

BRANCH=None
BUG=None
TEST=make buildall -j
     Enable console on ryu_p2 and discovery-stm32f072 board
     Verify that it works on both

Change-Id: Id118627f53e9e8ff1bd09fb51f1f9634ff495d19
Reviewed-on: https://chromium-review.googlesource.com/228833
Tested-by: Anton Staaf <robotboy@chromium.org>
Reviewed-by: Vincent Palatin <vpalatin@chromium.org>
Commit-Queue: Anton Staaf <robotboy@chromium.org>

6 files changed, 28 insertions, 10 deletions

diff --git a/chip/stm32/config-stm32f07x.h b/chip/stm32/config-stm32f07x.h
index fd1b46bc98..bae4e254be 100644
--- a/chip/stm32/config-stm32f07x.h
+++ b/chip/stm32/config-stm32f07x.h
@@ -41,5 +41,8 @@
 #undef CONFIG_CONSOLE_HISTORY
 #define CONFIG_CONSOLE_HISTORY 3
 
-/* STM32F0 has a larger USB RAM */
-#define CONFIG_USB_RAM_SIZE 1024
+/* USB packet ram config */
+#define CONFIG_USB_RAM_BASE        0x40006000
+#define CONFIG_USB_RAM_SIZE        1024
+#define CONFIG_USB_RAM_ACCESS_TYPE uint16_t
+#define CONFIG_USB_RAM_ACCESS_SIZE 2
diff --git a/chip/stm32/config-stm32f373.h b/chip/stm32/config-stm32f373.h
index 2553702877..32a9d0b5fa 100644
--- a/chip/stm32/config-stm32f373.h
+++ b/chip/stm32/config-stm32f373.h
@@ -37,5 +37,8 @@
 /* Number of IRQ vectors on the NVIC */
 #define CONFIG_IRQ_COUNT 81
 
-/* STM32F3 has a larger USB RAM */
-#define CONFIG_USB_RAM_SIZE 512
+/* STM32F3 uses the older 4 byte aligned access mechanism */
+#define CONFIG_USB_RAM_BASE        0x40006000
+#define CONFIG_USB_RAM_SIZE        512
+#define CONFIG_USB_RAM_ACCESS_TYPE uint32_t
+#define CONFIG_USB_RAM_ACCESS_SIZE 4
diff --git a/chip/stm32/config-stm32l100.h b/chip/stm32/config-stm32l100.h
index 1d18b6c5e8..983f956b84 100644
--- a/chip/stm32/config-stm32l100.h
+++ b/chip/stm32/config-stm32l100.h
@@ -54,3 +54,9 @@
 
 /* Fake hibernate mode */
 #define CONFIG_STM32L_FAKE_HIBERNATE
+
+/* USB packet ram config */
+#define CONFIG_USB_RAM_BASE        0x40006000
+#define CONFIG_USB_RAM_SIZE        512
+#define CONFIG_USB_RAM_ACCESS_TYPE uint32_t
+#define CONFIG_USB_RAM_ACCESS_SIZE 4
diff --git a/chip/stm32/config-stm32l15x.h b/chip/stm32/config-stm32l15x.h
index 6e9b862dab..4ba9fe24b5 100644
--- a/chip/stm32/config-stm32l15x.h
+++ b/chip/stm32/config-stm32l15x.h
@@ -55,3 +55,9 @@
 
 /* Flash erases to 0, not 1 */
 #define CONFIG_FLASH_ERASED_VALUE32 0
+
+/* USB packet ram config */
+#define CONFIG_USB_RAM_BASE        0x40006000
+#define CONFIG_USB_RAM_SIZE        512
+#define CONFIG_USB_RAM_ACCESS_TYPE uint32_t
+#define CONFIG_USB_RAM_ACCESS_SIZE 4
diff --git a/chip/stm32/config-stm32ts60.h b/chip/stm32/config-stm32ts60.h
index 2e92016830..0713b201d6 100644
--- a/chip/stm32/config-stm32ts60.h
+++ b/chip/stm32/config-stm32ts60.h
@@ -44,3 +44,9 @@
 /* Only USART2 support */
 #undef CONFIG_UART_CONSOLE
 #define CONFIG_UART_CONSOLE 2
+
+/* USB packet ram config */
+#define CONFIG_USB_RAM_BASE        0x40006000
+#define CONFIG_USB_RAM_SIZE        512
+#define CONFIG_USB_RAM_ACCESS_TYPE uint32_t
+#define CONFIG_USB_RAM_ACCESS_SIZE 4
diff --git a/chip/stm32/config_chip.h b/chip/stm32/config_chip.h
index ebd2f00acc..081e8ca478 100644
--- a/chip/stm32/config_chip.h
+++ b/chip/stm32/config_chip.h
@@ -88,10 +88,4 @@
 /* Compile for running from RAM instead of flash */
 /* #define COMPILE_FOR_RAM */
 
-/* Dedicated SRAM region for USB transfers */
-#define CONFIG_USB_RAM_BASE 0x40006000
-#ifndef CONFIG_USB_RAM_SIZE
-#define CONFIG_USB_RAM_SIZE 512
-#endif
-
 #endif /* __CROS_EC_CONFIG_CHIP_H */