diff options
| author | Shawn Nematbakhsh <shawnn@chromium.org> | 2015-02-27 16:05:54 -0800 |
|---|---|---|
| committer | ChromeOS Commit Bot <chromeos-commit-bot@chromium.org> | 2015-02-28 03:46:35 +0000 |
| commit | d1939ee10155af38a869e5315e6374af73200e5f (patch) | |
| tree | 05ca7c8f260a12c87d73492fa9f18f33f39f4ffc /chip | |
| parent | 8fe9304ae24d736698f8c7d02b299b8c815de91f (diff) | |
| download | chrome-ec-d1939ee10155af38a869e5315e6374af73200e5f.tar.gz | |
stm32f0: Fix RTC read glitch
Reads to RTC_SSR may be invalid if they occur close to the RTCCLK edge.
As suggested by the datasheet, perform consecutive identical reads to
ensure the read is valid.
BUG=chrome-os-partner:37216
TEST=Manual on Samus. Repeatedly call rtc_read in test function, verify
that RTC_SSR never incorrectly ticks up.
BRANCH=Samus
Signed-off-by: Shawn Nematbakhsh <shawnn@chromium.org>
Change-Id: Ib26fbfab4a07263f638c580066e993675dd8c451
Reviewed-on: https://chromium-review.googlesource.com/254725
Reviewed-by: Alec Berg <alecaberg@chromium.org>
Diffstat (limited to 'chip')
| -rw-r--r-- | chip/stm32/clock-stm32f0.c | 8 |
1 files changed, 7 insertions, 1 deletions
diff --git a/chip/stm32/clock-stm32f0.c b/chip/stm32/clock-stm32f0.c index fe474fe326..3586b64a5c 100644 --- a/chip/stm32/clock-stm32f0.c +++ b/chip/stm32/clock-stm32f0.c @@ -131,7 +131,13 @@ static inline void rtc_read(uint32_t *rtc, uint32_t *rtcss) /* Read current time synchronously */ do { *rtc = STM32_RTC_TR; - *rtcss = STM32_RTC_SSR; + /* + * RTC_SSR must be read twice with identical values because + * glitches may occur for reads close to the RTCCLK edge. + */ + do { + *rtcss = STM32_RTC_SSR; + } while (*rtcss != STM32_RTC_SSR); } while (*rtc != STM32_RTC_TR); } |