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authorAseda Aboagye <aaboagye@google.com>2015-04-08 16:42:55 -0700
committerChromeOS Commit Bot <chromeos-commit-bot@chromium.org>2015-04-10 22:08:25 +0000
commite9883124ff1600db5788e44c332a403499fb5da6 (patch)
tree5e5b64b72e89037845cc549e1c4262bf9d224a04 /chip
parent0b043fed030129ea99272f1ba729307fafaa93e2 (diff)
downloadchrome-ec-e9883124ff1600db5788e44c332a403499fb5da6.tar.gz
gpio: Refactor IRQ handler pointer out of gpio_list
In the gpio_info struct, we had a irq_handler pointer defined even though a majority of the GPIOs did not have irq handlers associated. By removing the irq_handler pointer out of the struct, we can save some space with some targets saving more than others. (For example, ~260 bytes for samus_pd). This change also brings about a new define: GPIO_INT(name, port, pin, flags, signal) And the existing GPIO macro has had the signal parameter removed since they were just NULL. GPIO(name, port, pin, flags) In each of the gpio.inc files, all the GPIOs with irq handlers must be defined at the top of the file. This is because their enum values from gpio_signal are used as the index to the gpio_irq_handlers table. BUG=chromium:471331 BRANCH=none TEST=Flashed ec to samus and samus_pd, verified lightbar tap, lid, power button, keyboard, charging, all still working. TEST=Moved a GPIO_INT declaration after a GPIO declaration and watched the build fail. TEST=make -j BOARD=peppy tests TEST=make -j BOARD=auron tests TEST=make -j BOARD=link tests Change-Id: Id6e261b0a3cd63223ca92f2e96a80c95e85cdefb Signed-off-by: Aseda Aboagye <aaboagye@google.com> Reviewed-on: https://chromium-review.googlesource.com/263973 Reviewed-by: Randall Spangler <rspangler@chromium.org> Tested-by: Aseda Aboagye <aaboagye@chromium.org> Commit-Queue: Aseda Aboagye <aaboagye@chromium.org> Trybot-Ready: Aseda Aboagye <aaboagye@chromium.org> Reviewed-by: Alec Berg <alecaberg@chromium.org>
Diffstat (limited to 'chip')
-rw-r--r--chip/g/gpio.c6
-rw-r--r--chip/host/gpio.c5
-rw-r--r--chip/it83xx/gpio.c8
-rw-r--r--chip/lm4/gpio.c11
-rw-r--r--chip/mec1322/gpio.c6
-rw-r--r--chip/npcx/gpio.c6
-rw-r--r--chip/nrf51/gpio.c15
-rw-r--r--chip/stm32/gpio.c23
8 files changed, 41 insertions, 39 deletions
diff --git a/chip/g/gpio.c b/chip/g/gpio.c
index 0dd6122d54..8be9f06fca 100644
--- a/chip/g/gpio.c
+++ b/chip/g/gpio.c
@@ -174,9 +174,9 @@ static void gpio_invoke_handler(uint32_t port, uint32_t mask)
{
const struct gpio_info *g = gpio_list;
int i;
- for (i = 0; i < GPIO_COUNT; i++, g++)
- if (g->irq_handler && port == g->port && (mask & g->mask))
- g->irq_handler(i);
+ for (i = 0; i < GPIO_IH_COUNT; i++, g++)
+ if (port == g->port && (mask & g->mask))
+ gpio_irq_handlers[i](i);
}
static void gpio_interrupt(int port)
diff --git a/chip/host/gpio.c b/chip/host/gpio.c
index eda2c456bf..c6c415a084 100644
--- a/chip/host/gpio.c
+++ b/chip/host/gpio.c
@@ -43,14 +43,15 @@ test_mockable void gpio_set_level(enum gpio_signal signal, int value)
const struct gpio_info *g = gpio_list + signal;
const uint32_t flags = g->flags;
const int old_value = gpio_values[signal];
+ void (*ih)(enum gpio_signal signal) = gpio_irq_handlers[signal];
gpio_values[signal] = value;
- if (g->irq_handler == NULL || !gpio_interrupt_enabled[signal])
+ if (signal >= GPIO_IH_COUNT || !gpio_interrupt_enabled[signal])
return;
if (gpio_interrupt_check(flags, old_value, value))
- g->irq_handler(signal);
+ ih(signal);
}
test_mockable int gpio_enable_interrupt(enum gpio_signal signal)
diff --git a/chip/it83xx/gpio.c b/chip/it83xx/gpio.c
index 7bdc41682c..09f7ff2492 100644
--- a/chip/it83xx/gpio.c
+++ b/chip/it83xx/gpio.c
@@ -330,8 +330,6 @@ void gpio_pre_init(void)
}
}
-
-
/**
* Handle a GPIO interrupt by calling the pins corresponding handler if
* one exists.
@@ -344,9 +342,9 @@ static void gpio_interrupt(int port, uint8_t mask)
int i = 0;
const struct gpio_info *g = gpio_list;
- for (i = 0; i < GPIO_COUNT; i++, g++) {
- if (port == g->port && (mask & g->mask) && g->irq_handler) {
- g->irq_handler(i);
+ for (i = 0; i < GPIO_IH_COUNT; i++, g++) {
+ if (port == g->port && (mask & g->mask))
+ gpio_irq_handlers[i](i);
return;
}
}
diff --git a/chip/lm4/gpio.c b/chip/lm4/gpio.c
index e5236e31d2..97e886294b 100644
--- a/chip/lm4/gpio.c
+++ b/chip/lm4/gpio.c
@@ -150,9 +150,8 @@ void gpio_set_flags_by_mask(uint32_t port, uint32_t mask, uint32_t flags)
int gpio_enable_interrupt(enum gpio_signal signal)
{
const struct gpio_info *g = gpio_list + signal;
-
/* Fail if no interrupt handler */
- if (!g->irq_handler)
+ if (signal >= GPIO_IH_COUNT)
return EC_ERROR_UNKNOWN;
LM4_GPIO_IM(g->port) |= g->mask;
@@ -164,7 +163,7 @@ int gpio_disable_interrupt(enum gpio_signal signal)
const struct gpio_info *g = gpio_list + signal;
/* Fail if no interrupt handler */
- if (!g->irq_handler)
+ if (signal >= GPIO_IH_COUNT)
return EC_ERROR_UNKNOWN;
LM4_GPIO_IM(g->port) &= ~g->mask;
@@ -305,9 +304,9 @@ static void gpio_interrupt(int port, uint32_t mis)
int i = 0;
const struct gpio_info *g = gpio_list;
- for (i = 0; i < GPIO_COUNT && mis; i++, g++) {
- if (port == g->port && (mis & g->mask) && g->irq_handler) {
- g->irq_handler(i);
+ for (i = 0; i < GPIO_IH_COUNT && mis; i++, g++) {
+ if (port == g->port && (mis & g->mask)) {
+ gpio_irq_handlers[i](i);
mis &= ~g->mask;
}
}
diff --git a/chip/mec1322/gpio.c b/chip/mec1322/gpio.c
index 783fa52bf4..06fca36f7e 100644
--- a/chip/mec1322/gpio.c
+++ b/chip/mec1322/gpio.c
@@ -218,12 +218,10 @@ static void gpio_interrupt(int girq, int port_offset)
MEC1322_INT_SOURCE(girq) |= sts;
- for (i = 0; i < GPIO_COUNT && sts; ++i, ++g) {
- if (!g->irq_handler)
- continue;
+ for (i = 0; i < GPIO_IH_COUNT && sts; ++i, ++g) {
bit = (g->port - port_offset) * 8 + __builtin_ffs(g->mask) - 1;
if (sts & (1 << bit))
- g->irq_handler(i);
+ gpio_irq_handlers[i](i);
sts &= ~(1 << bit);
}
}
diff --git a/chip/npcx/gpio.c b/chip/npcx/gpio.c
index 8afd7d05fb..0b9b4b664f 100644
--- a/chip/npcx/gpio.c
+++ b/chip/npcx/gpio.c
@@ -350,9 +350,9 @@ void gpio_execute_isr(uint8_t port, uint8_t mask)
int i;
const struct gpio_info *g = gpio_list;
/* Find GPIOs and execute interrupt service routine */
- for (i = 0; i < GPIO_COUNT; i++, g++) {
- if (port == g->port && mask == g->mask && g->irq_handler) {
- g->irq_handler(i);
+ for (i = 0; i < GPIO_IH_COUNT; i++, g++) {
+ if (port == g->port && mask == g->mask) {
+ gpio_irq_handlers[i](i);
return;
}
}
diff --git a/chip/nrf51/gpio.c b/chip/nrf51/gpio.c
index ccb453d0c2..22a7d95fa1 100644
--- a/chip/nrf51/gpio.c
+++ b/chip/nrf51/gpio.c
@@ -193,7 +193,7 @@ int gpio_enable_interrupt(enum gpio_signal signal)
const struct gpio_info *g = gpio_list + signal;
/* Fail if not implemented or no interrupt handler */
- if (!g->mask || !g->irq_handler)
+ if (!g->mask || signal >= GPIO_IH_COUNT)
return EC_ERROR_INVAL;
/* If it's not shared, use INT0-INT3, otherwise use PORT. */
@@ -253,7 +253,7 @@ int gpio_disable_interrupt(enum gpio_signal signal)
int i;
/* Fail if not implemented or no interrupt handler */
- if (!g->mask || !g->irq_handler)
+ if (!g->mask || signal >= GPIO_IH_COUNT)
return EC_ERROR_INVAL;
/* If it's not shared, use INT0-INT3, otherwise use PORT. */
@@ -285,21 +285,24 @@ void gpio_interrupt(void)
{
const struct gpio_info *g;
int i;
+ int signal;
for (i = 0; i < NRF51_GPIOTE_IN_COUNT; i++) {
if (NRF51_GPIOTE_IN(i)) {
NRF51_GPIOTE_IN(i) = 0;
g = gpio_ints[i];
- if (g && g->irq_handler)
- g->irq_handler(g - gpio_list);
+ signal = g - gpio_list;
+ if (g && signal < GPIO_IH_COUNT)
+ gpio_irq_handlers[signal](signal);
}
}
if (NRF51_GPIOTE_PORT) {
NRF51_GPIOTE_PORT = 0;
g = gpio_int_port;
- if (g && g->irq_handler)
- g->irq_handler(g - gpio_list);
+ signal = g - gpio_list;
+ if (g && signal < GPIO_IH_COUNT)
+ gpio_irq_handlers[signal](signal);
}
}
DECLARE_IRQ(NRF51_PERID_GPIOTE, gpio_interrupt, 1);
diff --git a/chip/stm32/gpio.c b/chip/stm32/gpio.c
index ef7fc818ba..d58ce29328 100644
--- a/chip/stm32/gpio.c
+++ b/chip/stm32/gpio.c
@@ -16,9 +16,8 @@
/* Console output macros */
#define CPRINTS(format, args...) cprints(CC_GPIO, format, ## args)
-
/* For each EXTI bit, record which GPIO entry is using it */
-static const struct gpio_info *exti_events[16];
+static uint8_t exti_events[16];
void gpio_pre_init(void)
{
@@ -75,19 +74,23 @@ void gpio_set_level(enum gpio_signal signal, int value)
int gpio_enable_interrupt(enum gpio_signal signal)
{
const struct gpio_info *g = gpio_list + signal;
+ const struct gpio_info *g_old = gpio_list;
+
uint32_t bit, group, shift, bank;
/* Fail if not implemented or no interrupt handler */
- if (!g->mask || !g->irq_handler)
+ if (!g->mask || signal >= GPIO_IH_COUNT)
return EC_ERROR_INVAL;
bit = 31 - __builtin_clz(g->mask);
- if ((exti_events[bit]) && (exti_events[bit] != g)) {
+ g_old += exti_events[bit];
+
+ if ((exti_events[bit]) && (exti_events[bit] != signal)) {
CPRINTS("Overriding %s with %s on EXTI%d",
- exti_events[bit]->name, g->name, bit);
+ g_old->name, g->name, bit);
}
- exti_events[bit] = g;
+ exti_events[bit] = signal;
group = bit / 4;
shift = (bit % 4) * 4;
@@ -115,17 +118,17 @@ int gpio_enable_interrupt(enum gpio_signal signal)
void gpio_interrupt(void)
{
int bit;
- const struct gpio_info *g;
/* process only GPIO EXTINTs (EXTINT0..15) not other EXTINTs */
uint32_t pending = STM32_EXTI_PR & 0xFFFF;
+ uint8_t signal;
STM32_EXTI_PR = pending;
while (pending) {
bit = get_next_bit(&pending);
- g = exti_events[bit];
- if (g && g->irq_handler)
- g->irq_handler(g - gpio_list);
+ signal = exti_events[bit];
+ if (signal < GPIO_IH_COUNT)
+ gpio_irq_handlers[signal](signal);
}
}
#ifdef CHIP_FAMILY_STM32F0