cr50: make customized RO work

This patch completes introduction of building of proper RO and RW
images for cr50.

A few small mods were required:

- both RO and RW images have to be signed, using the same dedicated
  signer, but with different keys, dev_key.pem is not needed any more.

- the RW image offset is not at the half of available flash, a chip
  specific value of 16K is used instead.

   The suggested new image layout is as follows:

   +----------------------------------------+
   |       1KB RO signature header.         |
   +----------------------------------------+
   -                                        -
   |       15KB RO image.                   |
   -                                        -
   +========================================+
   |       1KB RW-A signature header.       |
   +----------------------------------------+
   -                                        -
   -                                        -
   |       239K RW-A image.                 |
   -                                        -
   -                                        -
   +========================================+
   -                                        -
   |       16 KB NVRAM, shared              |
   -                                        -
   +========================================+
   |       1KB RW-B signature header.       |
   +----------------------------------------+
   -                                        -
   -                                        -
   |       239K RW-B image.                 |
   -                                        -
   -                                        -
   +========================================+

BRANCH=none
BUG=chrome-os-partner:43025

TEST=The combined image (build/cr50/ec.hex) is successfully loaded and
     started by the spiflash utility from the latest FPGA tarball.
     Corrupting a byte in the generated image in the RW section causes
     failure to verify.

Change-Id: I41a05168b0d4e9f88efa1003f261b6dd03972a24
Signed-off-by: Vadim Bendebury <vbendeb@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/311422
Reviewed-by: Bill Richardson <wfrichar@chromium.org>

2 files changed, 12 insertions, 3 deletions

diff --git a/chip/g/build.mk b/chip/g/build.mk
index 4e9ec7208f..1648389d42 100644
--- a/chip/g/build.mk
+++ b/chip/g/build.mk
@@ -4,7 +4,7 @@
 # found in the LICENSE file.
 #
 
-SIGNED_RO_IMAGE = 1
+SIGNED_IMAGES = 1
 
 CORE:=cortex-m
 CFLAGS_CPU+=-march=armv7-m -mcpu=cortex-m3
@@ -46,7 +46,9 @@ custom-ro_objs-y += chip/g/loader/main.o
 custom-ro_objs-y += chip/g/loader/rom_flash.o
 custom-ro_objs-y += chip/g/loader/setup.o
 custom-ro_objs-y += chip/g/loader/verify.o
+custom-ro_objs-y += chip/g/pmu.o
 custom-ro_objs-y += chip/g/system.o
+custom-ro_objs-y += chip/g/trng.o
 custom-ro_objs-y += chip/g/uart.o
 custom-ro_objs-y += common/printf.o
 custom-ro_objs-y += common/util.o
@@ -55,7 +57,7 @@ custom-ro_objs-y += core/cortex-m/panic.o
 dirs-y += chip/g/loader
 endif
 
-
 $(out)/RO/ec.RO.flat: $(out)/util/signer
+$(out)/RW/ec.RW.flat: $(out)/util/signer
 
-$(out)/RO/ec.RO.hex: $(out)/RO/ec.RO.flat
+$(out)/%.hex: $(out)/%.flat
diff --git a/chip/g/config_chip.h b/chip/g/config_chip.h
index 1818fbce60..3978371a26 100644
--- a/chip/g/config_chip.h
+++ b/chip/g/config_chip.h
@@ -64,4 +64,11 @@
 /* Number of IRQ vectors on the NVIC */
 #define CONFIG_IRQ_COUNT (GC_INTERRUPTS_COUNT - 16)
 
+#undef CONFIG_RW_MEM_OFF
+
+/* Leaving 16K for the RO aka loader. */
+#define CONFIG_RW_MEM_OFF 0x4000
+
+#define CONFIG_CUSTOMIZED_RO
+
 #endif /* __CROS_EC_CONFIG_CHIP_H */